Lines Matching +full:mv64xxx +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
10 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <0>;
21 clock-names = "cpu_clk", "ddrclk", "powersave";
32 compatible = "marvell,kirkwood-mbus", "simple-bus";
33 #address-cells = <2>;
34 #size-cells = <1>;
36 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
41 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
42 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
45 #address-cells = <1>;
46 #size-cells = <1>;
49 bank-width = <1>;
50 compatible = "marvell,orion-nand";
52 chip-delay = <25>;
53 /* set partition map and/or chip-delay in board dts */
55 pinctrl-0 = <&pmx_nand>;
56 pinctrl-names = "default";
60 crypto_sram: sa-sram@301 {
61 compatible = "mmio-sram";
64 #address-cells = <1>;
65 #size-cells = <1>;
70 compatible = "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
75 pinctrl: pin-controller@10000 {
79 pmx_ge1: pmx-ge1 {
86 pmx_nand: pmx-nand {
96 pmx_spi: pmx-spi {
101 pmx_twsi0: pmx-twsi0 {
110 pmx_uart0: pmx-uart0 {
115 pmx_uart1: pmx-uart1 {
121 core_clk: core-clocks@10030 {
122 compatible = "marvell,kirkwood-core-clock";
124 #clock-cells = <1>;
128 compatible = "marvell,orion-spi";
129 #address-cells = <1>;
130 #size-cells = <0>;
131 cell-index = <0>;
135 pinctrl-0 = <&pmx_spi>;
136 pinctrl-names = "default";
141 compatible = "marvell,orion-gpio";
142 #gpio-cells = <2>;
143 gpio-controller;
146 interrupt-controller;
147 #interrupt-cells = <2>;
153 compatible = "marvell,orion-gpio";
154 #gpio-cells = <2>;
155 gpio-controller;
158 interrupt-controller;
159 #interrupt-cells = <2>;
164 i2c0: i2c@11000 {
165 compatible = "marvell,mv64xxx-i2c";
167 #address-cells = <1>;
168 #size-cells = <0>;
170 clock-frequency = <100000>;
172 pinctrl-0 = <&pmx_twsi0>;
173 pinctrl-names = "default";
180 reg-shift = <2>;
183 pinctrl-0 = <&pmx_uart0>;
184 pinctrl-names = "default";
191 reg-shift = <2>;
194 pinctrl-0 = <&pmx_uart1>;
195 pinctrl-names = "default";
199 mbusc: mbus-controller@20000 {
200 compatible = "marvell,mbus-controller";
204 sysc: system-controller@20000 {
205 compatible = "marvell,orion-system-controller";
209 bridge_intc: bridge-interrupt-ctrl@20110 {
210 compatible = "marvell,orion-bridge-intc";
211 interrupt-controller;
212 #interrupt-cells = <1>;
218 gate_clk: clock-gating-control@2011c {
219 compatible = "marvell,kirkwood-gating-clock";
222 #clock-cells = <1>;
225 l2: l2-cache@20128 {
226 compatible = "marvell,kirkwood-cache";
230 intc: main-interrupt-ctrl@20200 {
231 compatible = "marvell,orion-intc";
232 interrupt-controller;
233 #interrupt-cells = <1>;
238 compatible = "marvell,orion-timer";
240 interrupt-parent = <&bridge_intc>;
245 wdt: watchdog-timer@20300 {
246 compatible = "marvell,orion-wdt";
248 interrupt-parent = <&bridge_intc>;
255 compatible = "marvell,kirkwood-crypto";
257 reg-names = "regs";
260 marvell,crypto-srams = <&crypto_sram>;
261 marvell,crypto-sram-size = <0x800>;
266 compatible = "marvell,orion-ehci";
274 compatible = "marvell,orion-xor";
294 compatible = "marvell,orion-xor";
313 eth0: ethernet-controller@72000 {
314 compatible = "marvell,kirkwood-eth";
315 #address-cells = <1>;
316 #size-cells = <0>;
319 marvell,tx-checksum-limit = <1600>;
322 eth0port: ethernet0-port@0 {
323 compatible = "marvell,kirkwood-eth-port";
327 local-mac-address = [00 00 00 00 00 00];
328 /* set phy-handle property in board file */
332 mdio: mdio-bus@72004 {
333 compatible = "marvell,orion-mdio";
334 #address-cells = <1>;
335 #size-cells = <0>;
344 eth1: ethernet-controller@76000 {
345 compatible = "marvell,kirkwood-eth";
346 #address-cells = <1>;
347 #size-cells = <0>;
350 marvell,tx-checksum-limit = <1600>;
351 pinctrl-0 = <&pmx_ge1>;
352 pinctrl-names = "default";
355 eth1port: ethernet1-port@0 {
356 compatible = "marvell,kirkwood-eth-port";
360 local-mac-address = [00 00 00 00 00 00];
361 /* set phy-handle property in board file */
365 sata_phy0: sata-phy@82000 {
366 compatible = "marvell,mvebu-sata-phy";
369 clock-names = "sata";
370 #phy-cells = <0>;
374 sata_phy1: sata-phy@84000 {
375 compatible = "marvell,mvebu-sata-phy";
378 clock-names = "sata";
379 #phy-cells = <0>;
383 audio0: audio-controller@a0000 {
384 compatible = "marvell,kirkwood-audio";
385 #sound-dai-cells = <0>;
389 clock-names = "internal";