Lines Matching full:names

16 		clock-output-names = "arm-pll-clk";
18 		reg-names = "control";
26 		reg-names = "control", "multiplier", "post-divider";
33 		clock-output-names = "papllclk";
35 		reg-names = "control";
42 		clock-output-names = "ddr-3a-pll-clk";
44 		reg-names = "control";
51 		clock-output-names = "dfe";
52 		reg-names = "control", "domain";
61 		clock-output-names = "pcie";
63 		reg-names = "control", "domain";
71 		clock-output-names = "gem1";
73 		reg-names = "control", "domain";
81 		clock-output-names = "gem2";
83 		reg-names = "control", "domain";
91 		clock-output-names = "gem3";
93 		reg-names = "control", "domain";
101 		clock-output-names = "tac";
103 		reg-names = "control", "domain";
111 		clock-output-names = "rac";
113 		reg-names = "control", "domain";
121 		clock-output-names = "dfe-pd0";
123 		reg-names = "control", "domain";
131 		clock-output-names = "fftc-0";
133 		reg-names = "control", "domain";
141 		clock-output-names = "osr";
143 		reg-names = "control", "domain";
151 		clock-output-names = "tcp3d-0";
153 		reg-names = "control", "domain";
161 		clock-output-names = "tcp3d-1";
163 		reg-names = "control", "domain";
171 		clock-output-names = "vcp-0";
173 		reg-names = "control", "domain";
181 		clock-output-names = "vcp-1";
183 		reg-names = "control", "domain";
191 		clock-output-names = "vcp-2";
193 		reg-names = "control", "domain";
201 		clock-output-names = "vcp-3";
203 		reg-names = "control", "domain";
211 		clock-output-names = "bcp";
213 		reg-names = "control", "domain";
221 		clock-output-names = "dfe-pd1";
223 		reg-names = "control", "domain";
231 		clock-output-names = "fftc-1";
233 		reg-names = "control", "domain";
241 		clock-output-names = "iqn-ail";
243 		reg-names = "control", "domain";
251 		clock-output-names = "uart2";
253 		reg-names = "control", "domain";
261 		clock-output-names = "uart3";
263 		reg-names = "control", "domain";