Lines Matching +full:0 +full:x23100000
35 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
50 reg = <0x0 0x02561000 0x0 0x1000>,
51 <0x0 0x02562000 0x0 0x2000>,
52 <0x0 0x02564000 0x0 0x1000>,
53 <0x0 0x02566000 0x0 0x2000>;
70 reg = <0x02530c00 0x100>;
78 #size-cells = <0>;
82 reg = <0x04200f00 0x100>;
90 #size-cells = <0>;
91 reg = <0x02940000 0x1000>,
92 <0x24000000 0x4000000>;
97 cdns,trigger-address = <0x24000000>;
105 reg = <0x02900000 0x40000>;
111 reg = <0x21805400 0x200>;
113 ti,davinci-spi-intr-line = <0>;
116 #size-cells = <0>;
122 reg = <0x21805800 0x200>;
124 ti,davinci-spi-intr-line = <0>;
127 #size-cells = <0>;
133 reg = <0x21805C00 0x200>;
135 ti,davinci-spi-intr-line = <0>;
138 #size-cells = <0>;
144 reg = <0x21806000 0x200>;
146 ti,davinci-spi-intr-line = <0>;
149 #size-cells = <0>;
154 reg = <0x02530000 0x400>;
158 #size-cells = <0>;
164 reg = <0x02530400 0x400>;
168 #size-cells = <0>;
174 reg = <0x02530800 0x400>;
178 #size-cells = <0>;
184 reg = <0x23000000 0x400>;
195 reg = <0x23100000 0x400>;
205 usb0_phy: usb-phy@0 {
214 reg = <0x2680000 0x10000>;
220 /*power-domains = <&k2g_pds 0x0016>;*/
224 reg = <0x2690000 0x10000>;
242 reg = <0x2580000 0x10000>;
248 /*power-domains = <&k2g_pds 0x0017>;*/
252 reg = <0x2590000 0x10000>;