arm/dts/keystone-clocks.dtsi

17 		#clock-cells = <0>;
20 		reg = <0x02310108 4>;
27 		#clock-cells = <0>;
36 		#clock-cells = <0>;
45 		#clock-cells = <0>;
48 		reg = <0x02310120 4>;
49 		bit-shift = <0>;
55 		#clock-cells = <0>;
58 		reg = <0x02310164 4>;
59 		bit-shift = <0>;
65 		#clock-cells = <0>;
74 		#clock-cells = <0>;
83 		#clock-cells = <0>;
92 		#clock-cells = <0>;
101 		#clock-cells = <0>;
110 		#clock-cells = <0>;
119 		#clock-cells = <0>;
128 		#clock-cells = <0>;
137 		#clock-cells = <0>;
146 		#clock-cells = <0>;
155 		#clock-cells = <0>;
164 		#clock-cells = <0>;
168 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
170 		domain-id = <0>;
175 		#clock-cells = <0>;
179 		reg = <0x02350008 0xb00>, <0x02350000 0x400>;
181 		domain-id = <0>;
185 		#clock-cells = <0>;
189 		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
191 		domain-id = <0>;
196 		#clock-cells = <0>;
200 		reg = <0x02350014 0xb00>, <0x02350000 0x400>;
206 		#clock-cells = <0>;
210 		reg = <0x02350018 0xb00>, <0x02350004 0x400>;
216 		#clock-cells = <0>;
220 		reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
226 		#clock-cells = <0>;
230 		reg = <0x02350020 0xb00>, <0x02350008 0x400>;
236 		#clock-cells = <0>;
240 		reg = <0x02350024 0xb00>, <0x02350008 0x400>;
246 		#clock-cells = <0>;
250 		reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
256 		#clock-cells = <0>;
260 		reg = <0x02350034 0xb00>, <0x02350018 0x400>;
266 		#clock-cells = <0>;
270 		reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
276 		#clock-cells = <0>;
279 		clock-output-names = "ddr3-0";
280 		reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
286 		#clock-cells = <0>;
290 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
292 		domain-id = <0>;
296 		#clock-cells = <0>;
300 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
302 		domain-id = <0>;
306 		#clock-cells = <0>;
310 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
312 		domain-id = <0>;
316 		#clock-cells = <0>;
320 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
322 		domain-id = <0>;
326 		#clock-cells = <0>;
330 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
332 		domain-id = <0>;
336 		#clock-cells = <0>;
340 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
342 		domain-id = <0>;
346 		#clock-cells = <0>;
350 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
352 		domain-id = <0>;
356 		#clock-cells = <0>;
360 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
362 		domain-id = <0>;
366 		#clock-cells = <0>;
370 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
372 		domain-id = <0>;
376 		#clock-cells = <0>;
380 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
382 		domain-id = <0>;
386 		#clock-cells = <0>;
390 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
392 		domain-id = <0>;
396 		#clock-cells = <0>;
400 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
402 		domain-id = <0>;
406 		#clock-cells = <0>;
410 		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
412 		domain-id = <0>;