arm/dts/imx7ulp.dtsi

2  * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx7ulp-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx7ulp-pinfunc.h"
16 	interrupt-parent = <&intc>;
37 		#address-cells = <1>;
38 		#size-cells = <0>;
41 			compatible = "arm,cortex-a7";
47 	reserved-memory {
48 		#address-cells = <1>;
49 		#size-cells = <1>;
54 			compatible = "shared-dma-pool";
58 			linux,cma-default;
62 			no-map;
68 	intc: interrupt-controller@40021000 {
69 		compatible = "arm,cortex-a7-gic";
70 		#interrupt-cells = <3>;
71 		interrupt-controller;
77 		#address-cells = <1>;
78 		#size-cells = <0>;
81 			compatible = "fixed-clock";
82 			#clock-cells = <0>;
83 			clock-frequency = <32768>;
84 			clock-output-names = "ckil";
88 			compatible = "fixed-clock";
89 			#clock-cells = <0>;
90 			clock-frequency = <24000000>;
91 			clock-output-names = "osc";
95 			compatible = "fixed-clock";
96 			#clock-cells = <0>;
97 			clock-frequency = <16000000>;
98 			clock-output-names = "sirc";
102 			compatible = "fixed-clock";
103 			#clock-cells = <0>;
104 			clock-frequency = <48000000>;
105 			clock-output-names = "firc";
109 			compatible = "fixed-clock";
110 			#clock-cells = <0>;
111 			clock-frequency = <480000000>;
112 			clock-output-names = "upll";
116 			compatible = "fixed-clock";
117 			#clock-cells = <0>;
118 			clock-frequency = <480000000>;
119 			clock-output-names = "mpll";
124 		compatible = "fsl,lpm-sram";
128 	ahbbridge0: ahb-bridge0@40000000 {
129 		compatible = "fsl,aips-bus", "simple-bus";
130 		#address-cells = <1>;
131 		#size-cells = <1>;
135 		edma0: dma-controller@40080000 {
136 			#dma-cells = <2>;
137 			compatible = "nxp,imx7ulp-edma";
140 			dma-channels = <32>;
158 			clock-names = "dma", "dmamux0";
163 			compatible = "fsl,imx7ulp-mu", "fsl,imx6sx-mu";
171 			compatible = "fsl,imx7ulp-nmi";
178 			compatible = "fsl,imx7ulp-rpmsg";
179 			memory-region = <&rpmsg_reserved>;
184 			compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd";
187 			snvs_rtc: snvs-rtc-lp{
188 				compatible = "fsl,sec-v4.0-mon-rtc-lp";
192 				clock-names = "snvs-rtc";
198 			compatible = "fsl,imx7ulp-tpm";
205 			compatible = "fsl,imx-lpit";
210 			assigned-clock-rates = <48000000>;
211 			assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
212 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
216 			compatible = "fsl,imx7ulp-lpi2c";
220 			clock-names = "ipg";
221 			assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
222 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
223 			assigned-clock-rates = <48000000>;
228 			compatible = "fsl,imx7ulp-lpi2c";
232 			clock-names = "ipg";
233 			assigned-clocks = <&clks IMX7ULP_CLK_LPI2C5>;
234 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
235 			assigned-clock-rates = <48000000>;
240 			compatible = "fsl,imx7ulp-spi";
244 			clock-names = "ipg";
245 			assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>;
246 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
247 			assigned-clock-rates = <48000000>;
252 			compatible = "fsl,imx7ulp-spi";
256 			clock-names = "ipg";
257 			assigned-clocks = <&clks IMX7ULP_CLK_LPSPI3>;
258 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
259 			assigned-clock-rates = <48000000>;
264 			compatible = "fsl,imx7ulp-lpuart";
268 			clock-names = "ipg";
269 			assigned-clocks = <&clks IMX7ULP_CLK_LPUART4>;
270 			assigned-clock-parents = <&clks IMX7ULP_CLK_OSC>;
271 			assigned-clock-rates = <24000000>;
276 			compatible = "fsl,imx7ulp-lpuart";
280 			clock-names = "ipg";
281 			assigned-clocks = <&clks IMX7ULP_CLK_LPUART5>;
282 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
283 			assigned-clock-rates = <48000000>;
285 			dma-names = "tx","rx";
290 			compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
291 				"fsl,imx27-usb";
297 			ahb-burst-config = <0x0>;
298 			tx-burst-size-dword = <0x8>;
299 			rx-burst-size-dword = <0x8>;
304 			#index-cells = <1>;
305 			compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
306 				"fsl,imx6q-usbmisc";
311 			compatible = "fsl,imx7ulp-usbphy",
312 				"fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
320 			compatible = "fsl,imx7ulp-usdhc";
326 			clock-names ="ipg", "ahb", "per";
327 			bus-width = <4>;
328 			fsl,tuning-start-tap = <20>;
329 			fsl,tuning-step= <2>;
334 			compatible = "fsl,imx7ulp-usdhc";
340 			clock-names ="ipg", "ahb", "per";
341 			bus-width = <4>;
342 			fsl,tuning-start-tap = <20>;
343 			fsl,tuning-step= <2>;
348 			compatible = "fsl,imx7ulp-wdt";
352 			assigned-clocks = <&clks IMX7ULP_CLK_WDG1>;
353 			assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
359 			timeout-sec = <40>;
363 			compatible = "fsl,imx7ulp-wdt";
367 			assigned-clocks = <&clks IMX7ULP_CLK_WDG2>;
368 			assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
369 			timeout-sec = <40>;
373 			compatible = "fsl,imx7ulp-scg1";
377 			clock-names = "ckil", "osc", "sirc",
379 			#clock-cells = <1>;
380 			assigned-clocks = <&clks IMX7ULP_CLK_LPTPM5>,
382 			assigned-clock-parents = <&clks IMX7ULP_CLK_OSC>,
387 			compatible  = "fsl,imx7ulp-pcc2";
392 			compatible = "fsl,imx7ulp-pmc1";
397 			compatible = "fsl,imx7ulp-smc1";
403 	ahbbridge1: ahb-bridge1@40800000 {
404 		compatible = "fsl,aips-bus", "simple-bus";
405 		#address-cells = <1>;
406 		#size-cells = <1>;
411 			compatible = "fsl,imx7ulp-lpi2c";
415 			clock-names = "ipg";
416 			assigned-clocks = <&clks IMX7ULP_CLK_LPI2C6>;
417 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
418 			assigned-clock-rates = <48000000>;
423 			compatible = "fsl,imx7ulp-lpi2c";
427 			clock-names = "ipg";
428 			assigned-clocks = <&clks IMX7ULP_CLK_LPI2C7>;
429 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
430 			assigned-clock-rates = <48000000>;
435 			compatible = "fsl,imx7ulp-lpuart";
439 			clock-names = "ipg";
440 			assigned-clocks = <&clks IMX7ULP_CLK_LPUART6>;
441 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
442 			assigned-clock-rates = <48000000>;
444 			dma-names = "tx","rx";
449 			compatible = "fsl,imx7ulp-lpuart";
453 			clock-names = "ipg";
454 			assigned-clocks = <&clks IMX7ULP_CLK_LPUART7>;
455 			assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
456 			assigned-clock-rates = <50000000>;
458 			dma-names = "tx","rx";
463 			compatible = "fsl,imx7ulp-lcdif";
469 			clock-names = "axi", "pix", "disp_axi";
474 			compatible = "fsl,imx7ulp-mipi-dsi";
478 			clock-names = "mipi_dsi_clk";
484 			compatible = "fsl,imx7ulp-mmdc";
489 			compatible  = "fsl,imx7ulp-pcc3";
494 			compatible = "fsl,imx7ulp-iomuxc-0";
501 			compatible = "fsl,imx7ulp-iomuxc-1";
507 			compatible = "fsl,imx7ulp-gpio";
509 			gpio-controller;
510 			#gpio-cells = <2>;
512 			interrupt-controller;
513 			#interrupt-cells = <2>;
514 			gpio-ranges = <&iomuxc1 0 0 32>;
518 			compatible = "fsl,imx7ulp-gpio";
520 			gpio-controller;
521 			#gpio-cells = <2>;
523 			interrupt-controller;
524 			#interrupt-cells = <2>;
525 			gpio-ranges = <&iomuxc1 0 32 32>;
529 			compatible = "fsl,imx7ulp-gpio";
531 			gpio-controller;
532 			#gpio-cells = <2>;
534 			interrupt-controller;
535 			#interrupt-cells = <2>;
536 			gpio-ranges = <&iomuxc1 0 64 32>;
540 			compatible = "fsl,imx7ulp-gpio";
542 			gpio-controller;
543 			#gpio-cells = <2>;
545 			interrupt-controller;
546 			#interrupt-cells = <2>;
547 			gpio-ranges = <&iomuxc1 0 96 32>;
551 			compatible = "fsl,imx7ulp-pmc0";
556 			compatible = "fsl,imx7ulp-sim", "syscon";
561 			#address-cells = <1>;
562 			#size-cells = <0>;
563 			compatible = "fsl,imx7ulp-qspi";
565 			reg-names = "QuadSPI", "QuadSPI-memory";
569 			clock-names = "qspi_en", "qspi";
574 			compatible = "fsl,imx6q-gpu";
577 			reg-names = "iobase_3d", "iobase_2d",
581 			interrupt-names = "irq_3d", "irq_2d";
588 			clock-names = "gpu3d_clk", "gpu3d_shader_clk",
595     compatible = "fsl,mxc-ion";
596     fsl,heap-id = <0>;