Lines Matching +full:0 +full:x40380000
38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0>;
56 size = <0xC000000>;
57 alignment = <0x2000>;
63 reg = <0x9FF00000 0x100000>;
72 reg = <0x40021000 0x1000>,
73 <0x40022000 0x100>;
78 #size-cells = <0>;
80 ckil: clock@0 {
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #clock-cells = <0>;
110 #clock-cells = <0>;
117 #clock-cells = <0>;
125 reg = <0x1fffc000 0x4000>;
132 reg = <0x40000000 0x800000>;
138 reg = <0x40080000 0x2000>,
139 <0x40210000 0x1000>;
141 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
164 reg = <0x40220000 0x1000>;
172 reg = <0x40220000 0x1000>;
184 compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd";
185 reg = <0x40230000 0x10000>;
188 compatible = "fsl,sec-v4.0-mon-rtc-lp";
190 offset = <0x34>;
199 reg = <0x40260000 0x1000>;
206 reg = <0x40270000 0x1000>;
217 reg = <0x402B0000 0x10000>;
229 reg = <0x402C0000 0x10000>;
241 reg = <0x40290000 0x10000>;
253 reg = <0x402A0000 0x10000>;
265 reg = <0x402D0000 0x1000>;
277 reg = <0x402E0000 0x1000>;
284 dmas = <&edma0 0 20>, <&edma0 0 19>;
292 reg = <0x40330000 0x200>;
296 fsl,usbmisc = <&usbmisc1 0>;
297 ahb-burst-config = <0x0>;
298 tx-burst-size-dword = <0x8>;
299 rx-burst-size-dword = <0x8>;
307 reg = <0x40330200 0x200>;
310 usbphy1: usbphy@0x40350000 {
313 reg = <0x40350000 0x1000>;
321 reg = <0x40370000 0x10000>;
335 reg = <0x40380000 0x10000>;
349 reg = <0x403D0000 0x10000>;
364 reg = <0x40430000 0x10000>;
374 reg = <0x403E0000 0x10000>;
388 reg = <0x403F0000 0x10000>;
393 reg = <0x40400000 0x1000>;
398 reg = <0x40410000 0x1000>;
407 reg = <0x40800000 0x800000>;
412 reg = <0x40A40000 0x10000>;
424 reg = <0x40A50000 0x10000>;
436 reg = <0x40A60000 0x1000>;
443 dmas = <&edma0 0 22>, <&edma0 0 21>;
450 reg = <0x40A70000 0x1000>;
457 dmas = <&edma0 0 24>, <&edma0 0 23>;
464 reg = <0x40aa0000 0x10000>;
475 reg = <0x40A90000 0x10000>;
485 reg = <0x40ab0000 0x4000>;
490 reg = <0x40B30000 0x10000>;
494 compatible = "fsl,imx7ulp-iomuxc-0";
495 reg = <0x4103D000 0x1000>;
496 fsl,mux_mask = <0xf00>;
502 reg = <0x40ac0000 0x1000>;
503 fsl,mux_mask = <0xf00>;
508 reg = <0x40ae0000 0x1000 0x400F0000 0x40>;
514 gpio-ranges = <&iomuxc1 0 0 32>;
519 reg = <0x40af0000 0x1000 0x400F0040 0x40>;
525 gpio-ranges = <&iomuxc1 0 32 32>;
530 reg = <0x40b00000 0x1000 0x400F0080 0x40>;
536 gpio-ranges = <&iomuxc1 0 64 32>;
541 reg = <0x40b10000 0x1000 0x400F00c0 0x40>;
547 gpio-ranges = <&iomuxc1 0 96 32>;
552 reg = <0x410a1000 0x1000>;
557 reg = <0x410a3000 0x1000>;
562 #size-cells = <0>;
564 reg = <0x410A5000 0x10000>, <0xC0000000 0x10000000>;
575 reg = <0x41800000 0x80000>, <0x41880000 0x80000>,
576 <0x60000000 0x40000000>, <0x0 0x4000000>;
596 fsl,heap-id = <0>;