Lines Matching +full:0 +full:x30340000

94 		#size-cells = <0>;
96 cpu0: cpu@0 {
99 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
124 #phy-cells = <0>;
131 #phy-cells = <0>;
150 #size-cells = <0>;
152 port@0 {
153 reg = <0>;
168 reg = <0>;
195 reg = <0x30041000 0x1000>;
201 #size-cells = <0>;
204 port@0 {
205 reg = <0>;
214 reg = <0>;
226 reg = <0x3007c000 0x1000>;
240 reg = <0x30083000 0x1000>;
246 #size-cells = <0>;
249 port@0 {
250 reg = <0>;
265 reg = <0>;
277 reg = <0x30084000 0x1000>;
283 #size-cells = <0>;
285 port@0 {
286 reg = <0>;
294 reg = <0>;
304 reg = <0x30086000 0x1000>;
318 reg = <0x30087000 0x1000>;
336 reg = <0x31001000 0x1000>,
337 <0x31002000 0x2000>,
338 <0x31004000 0x2000>,
339 <0x31006000 0x2000>;
346 reg = <0x30000000 0x400000>;
351 reg = <0x30200000 0x10000>;
358 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
363 reg = <0x30210000 0x10000>;
370 gpio-ranges = <&iomuxc 0 13 32>;
375 reg = <0x30220000 0x10000>;
382 gpio-ranges = <&iomuxc 0 45 29>;
387 reg = <0x30230000 0x10000>;
394 gpio-ranges = <&iomuxc 0 74 24>;
399 reg = <0x30240000 0x10000>;
406 gpio-ranges = <&iomuxc 0 98 18>;
411 reg = <0x30250000 0x10000>;
418 gpio-ranges = <&iomuxc 0 116 23>;
423 reg = <0x30260000 0x10000>;
430 gpio-ranges = <&iomuxc 0 139 16>;
435 reg = <0x30280000 0x10000>;
442 reg = <0x30290000 0x10000>;
450 reg = <0x302a0000 0x10000>;
458 reg = <0x302b0000 0x10000>;
466 reg = <0x302c0000 0x10000>;
472 reg = <0x302d0000 0x10000>;
481 reg = <0x302e0000 0x10000>;
491 reg = <0x302f0000 0x10000>;
501 reg = <0x30300000 0x10000>;
511 reg = <0x30320000 0x10000>;
519 reg = <0x30330000 0x10000>;
525 reg = <0x30340000 0x10000>;
532 reg = <0x30350000 0x10000>;
536 reg = <0x3c 0x4>;
540 reg = <0x10 0x4>;
557 reg = <0x30360000 0x10000>;
561 #size-cells = <0>;
564 reg = <0x30360210>;
569 anatop-reg-offset = <0x210>;
575 anatop-enable-bit = <0>;
580 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
581 reg = <0x30370000 0x10000>;
584 compatible = "fsl,sec-v4.0-mon-rtc-lp";
586 offset = <0x34>;
596 offset = <0x38>;
597 value = <0x60>;
598 mask = <0x60>;
602 compatible = "fsl,sec-v4.0-pwrkey";
612 reg = <0x30380000 0x10000>;
622 reg = <0x30390000 0x10000>;
629 reg = <0x303a0000 0x10000>;
638 #size-cells = <0>;
641 #power-domain-cells = <0>;
653 reg = <0x30400000 0x400000>;
658 reg = <0x30610000 0x10000>;
667 reg = <0x30620000 0x10000>;
676 #size-cells = <0>;
678 reg = <0x30630000 0x10000>;
688 reg = <0x30660000 0x10000>;
699 reg = <0x30670000 0x10000>;
710 reg = <0x30680000 0x10000>;
721 reg = <0x30690000 0x10000>;
732 reg = <0x30730000 0x10000>;
745 reg = <0x30800000 0x400000>;
752 reg = <0x30800000 0x100000>;
757 #size-cells = <0>;
759 reg = <0x30820000 0x10000>;
769 #size-cells = <0>;
771 reg = <0x30830000 0x10000>;
781 #size-cells = <0>;
783 reg = <0x30840000 0x10000>;
794 reg = <0x30860000 0x10000>;
805 reg = <0x30890000 0x10000>;
816 reg = <0x30880000 0x10000>;
825 #sound-dai-cells = <0>;
827 reg = <0x308a0000 0x10000>;
835 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
840 #sound-dai-cells = <0>;
842 reg = <0x308b0000 0x10000>;
850 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
855 #sound-dai-cells = <0>;
857 reg = <0x308c0000 0x10000>;
865 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
871 compatible = "fsl,sec-v4.0";
874 reg = <0x30900000 0x40000>;
875 ranges = <0 0x30900000 0x40000>;
882 compatible = "fsl,sec-v4.0-job-ring";
883 reg = <0x1000 0x1000>;
888 compatible = "fsl,sec-v4.0-job-ring";
889 reg = <0x2000 0x1000>;
894 compatible = "fsl,sec-v4.0-job-ring";
895 reg = <0x3000 0x1000>;
902 reg = <0x30a00000 0x10000>;
912 reg = <0x30a10000 0x10000>;
922 #size-cells = <0>;
924 reg = <0x30a20000 0x10000>;
932 #size-cells = <0>;
934 reg = <0x30a30000 0x10000>;
942 #size-cells = <0>;
944 reg = <0x30a40000 0x10000>;
952 #size-cells = <0>;
954 reg = <0x30a50000 0x10000>;
963 reg = <0x30a60000 0x10000>;
974 reg = <0x30a70000 0x10000>;
985 reg = <0x30a80000 0x10000>;
996 reg = <0x30a90000 0x10000>;
1006 reg = <0x30b10000 0x200>;
1010 fsl,usbmisc = <&usbmisc1 0>;
1017 reg = <0x30b30000 0x200>;
1021 fsl,usbmisc = <&usbmisc3 0>;
1031 reg = <0x30b10200 0x200>;
1037 reg = <0x30b30200 0x200>;
1042 reg = <0x30b40000 0x10000>;
1054 reg = <0x30b50000 0x10000>;
1066 reg = <0x30b60000 0x10000>;
1078 #size-cells = <0>;
1080 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1091 reg = <0x30bd0000 0x10000>;
1102 reg = <0x30be0000 0x10000>;
1123 reg = <0x33000000 0x2000>;
1138 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1145 dmas = <&dma_apbh 0>;