Lines Matching full:assigned

79 	assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
80 	assigned-clock-rates = <884736000>;
220 	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
222 	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
223 	assigned-clock-rates = <0>, <36864000>;
230 	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
231 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
238 	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
239 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
247 	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
248 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
274 	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
275 	assigned-clock-rates = <400000000>;