Lines Matching +full:bypass +full:- +full:gpios
9 /dts-v1/;
15 compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
18 stdout-path = &uart1;
26 compatible = "pwm-backlight";
28 brightness-levels = <0 4 8 16 32 64 128 255>;
29 default-brightness-level = <6>;
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "regulator-fixed";
41 regulator-name = "can-3v3";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
48 compatible = "regulator-fixed";
49 regulator-name = "VSD_3V3";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
53 enable-active-high;
56 reg_gpio_dvfs: regulator-gpio {
57 compatible = "regulator-gpio";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_dvfs>;
60 regulator-min-microvolt = <1300000>;
61 regulator-max-microvolt = <1400000>;
62 regulator-name = "gpio_dvfs";
63 regulator-type = "voltage";
64 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
70 compatible = "spi-gpio";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_spi4>;
74 gpio-sck = <&gpio5 11 0>;
75 gpio-mosi = <&gpio5 10 0>;
76 cs-gpios = <&gpio5 7 0>;
77 num-chipselects = <1>;
78 #address-cells = <1>;
79 #size-cells = <0>;
83 gpio-controller;
84 oe-gpios = <&gpio5 8 0>;
85 #gpio-cells = <2>;
87 registers-number = <1>;
88 registers-default = /bits/ 8 <0x57>;
89 spi-max-frequency = <100000>;
95 arm-supply = <®_arm>;
96 soc-supply = <®_soc>;
97 dc-supply = <®_gpio_dvfs>;
101 assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
102 assigned-clock-rates = <786432000>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_enet1>;
108 phy-mode = "rmii";
109 phy-handle = <ðphy0>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_enet2>;
116 phy-mode = "rmii";
117 phy-handle = <ðphy1>;
121 #address-cells = <1>;
122 #size-cells = <0>;
124 ethphy0: ethernet-phy@2 {
125 compatible = "ethernet-phy-ieee802.3-c22";
129 ethphy1: ethernet-phy@1 {
130 compatible = "ethernet-phy-ieee802.3-c22";
141 fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
145 clock-frequency = <100000>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_i2c1>;
160 interrupt-parent = <&gpio5>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_i2c2>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_hog_1>;
175 imx6ul-evk {
176 pinctrl_hog_1: hoggrp-1 {
368 pinctrl-names = "default_snvs";
369 pinctrl-0 = <&pinctrl_hog_2>;
370 imx6ul-evk {
371 pinctrl_hog_2: hoggrp-2 {
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_lcdif_dat
417 bits-per-pixel = <16>;
418 bus-width = <24>;
420 display-timings {
421 native-mode = <&timing0>;
423 clock-frequency = <9200000>;
426 hfront-porch = <8>;
427 hback-porch = <4>;
428 hsync-len = <41>;
429 vback-porch = <2>;
430 vfront-porch = <4>;
431 vsync-len = <10>;
433 hsync-active = <0>;
434 vsync-active = <0>;
435 de-active = <1>;
436 pixelclk-active = <0>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&pinctrl_pwm1>;
449 pinctrl-names = "default";
450 pinctrl-0 = <&pinctrl_qspi>;
455 #address-cells = <1>;
456 #size-cells = <1>;
458 compatible = "spi-flash";
459 spi-max-frequency = <29000000>;
460 spi-nor,ddr-quad-read-dummy = <6>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_uart1>;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_uart2>;
474 fsl,uart-has-rtscts;
476 /* fsl,dte-mode; */
477 /* pinctrl-0 = <&pinctrl_uart2dte>; */
483 srp-disable;
484 hnp-disable;
485 adp-disable;
491 disable-over-current;
496 tx-d-cal = <0x5>;
500 tx-d-cal = <0x5>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_usdhc1>;
506 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
507 keep-power-in-suspend;
508 enable-sdio-wakeup;
509 vmmc-supply = <®_sd1_vmmc>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_usdhc2>;
516 no-1-8-v;
517 non-removable;
518 keep-power-in-suspend;
519 enable-sdio-wakeup;
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_wdog>;