Lines Matching +full:0 +full:x10b0

16 		reg = <0x80000000 0>;
25 pwms = <&pwm3 0 5000000>;
26 brightness-levels = <0 4 8 16 32 64 128 255>;
57 pinctrl-0 = <&pinctrl_usb_otg1>;
61 gpio = <&gpio1 6 0>;
69 pinctrl-0 = <&pinctrl_brcm_reg>;
79 pinctrl-0 = <&pinctrl_flexcan1>;
85 pinctrl-0 = <&pinctrl_flexcan2>;
96 pinctrl-0 = <&pinctrl_enet2>;
105 #size-cells = <0>;
120 pinctrl-0 = <&pinctrl_i2c1>;
125 reg = <0x08>;
156 pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
177 hsync-active = <0>;
178 vsync-active = <0>;
180 pixelclk-active = <0>;
188 pinctrl-0 = <&pinctrl_pwm3>;
194 pinctrl-0 = <&pinctrl_pwm7>;
200 pinctrl-0 = <&pinctrl_pwm8>;
206 pinctrl-0 = <&pinctrl_sai1>;
212 pinctrl-0 = <&pinctrl_uart3>;
219 pinctrl-0 = <&pinctrl_uart6>;
226 pinctrl-0 = <&pinctrl_usb_otg1_id>;
240 pinctrl-0 = <&pinctrl_usdhc1>;
250 pinctrl-0 = <&pinctrl_usdhc2>;
261 pinctrl-0 = <&pinctrl_wdog>;
268 MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x10b0 /* WL_REG_ON */
269 MX6UL_PAD_NAND_DATA04__GPIO4_IO06 0x10b0 /* WL_HOST_WAKE */
275 MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x1b0b0
276 MX6UL_PAD_ENET1_TX_EN__ENET2_MDC 0x1b0b0
277 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
278 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
279 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
280 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
281 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
282 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
283 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
284 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
285 MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x800
286 MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x79
292 MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020
293 MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020
299 MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
300 MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020
306 MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
307 MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
313 MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
314 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
320 MX6UL_PAD_UART1_TX_DATA__I2C3_SCL 0x4001b8b0
321 MX6UL_PAD_UART1_RX_DATA__I2C3_SDA 0x4001b8b0
327 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
328 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
329 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
330 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
331 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
332 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
333 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
334 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
335 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
336 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
337 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
338 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
339 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
340 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
341 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
342 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
343 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
344 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
345 MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
346 MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
347 MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
348 MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
349 MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
350 MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
356 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
357 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
358 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
359 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
361 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
367 MX6UL_PAD_NAND_ALE__PWM3_OUT 0x110b0
373 MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x110b0
379 MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
385 MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x1b0b0
386 MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x1b0b0
387 MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x110b0
388 MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x1f0b8
394 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b0
395 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b0
396 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b0
397 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b0
403 MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX 0x1b0b1
404 MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX 0x1b0b1
405 MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1
406 MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1
412 MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1
413 MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1
419 MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x10b0
425 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
431 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
432 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
433 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
434 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
435 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
436 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
437 MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029
438 MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
439 MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
440 MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
441 MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
447 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
448 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
449 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
450 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
451 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
452 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
458 MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0