Lines Matching +full:imx6q +full:- +full:iomuxc +full:- +full:gpr
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "imx6sl-pinfunc.h"
12 #include <dt-bindings/clock/imx6sl-clock.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
21 * Also for U-Boot there must be a pre-existing /memory node.
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
54 next-level-cache = <&L2>;
55 operating-points = <
61 fsl,soc-operating-points = <
62 /* ARM kHz SOC-PU uV */
67 clock-latency = <61036>; /* two CLK32 periods */
71 clock-names = "arm", "pll2_pfd2_396m", "step",
73 arm-supply = <®_arm>;
74 pu-supply = <®_pu>;
75 soc-supply = <®_soc>;
79 intc: interrupt-controller@00a01000 {
80 compatible = "arm,cortex-a9-gic";
81 #interrupt-cells = <3>;
82 interrupt-controller;
85 interrupt-parent = <&intc>;
89 #address-cells = <1>;
90 #size-cells = <0>;
93 compatible = "fixed-clock";
94 #clock-cells = <0>;
95 clock-frequency = <32768>;
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <24000000>;
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "simple-bus";
109 interrupt-parent = <&gpc>;
113 compatible = "mmio-sram";
118 L2: l2-cache@00a02000 {
119 compatible = "arm,pl310-cache";
122 cache-unified;
123 cache-level = <2>;
124 arm,tag-latency = <4 2 3>;
125 arm,data-latency = <4 2 3>;
129 compatible = "arm,cortex-a9-pmu";
133 aips1: aips-bus@02000000 {
134 compatible = "fsl,aips-bus", "simple-bus";
135 #address-cells = <1>;
136 #size-cells = <1>;
140 spba: spba-bus@02000000 {
141 compatible = "fsl,spba-bus", "simple-bus";
142 #address-cells = <1>;
143 #size-cells = <1>;
148 compatible = "fsl,imx6sl-spdif",
149 "fsl,imx35-spdif";
154 dma-names = "rx", "tx";
160 clock-names = "core", "rxtx0",
169 #address-cells = <1>;
170 #size-cells = <0>;
171 compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
176 clock-names = "ipg", "per";
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
188 clock-names = "ipg", "per";
193 #address-cells = <1>;
194 #size-cells = <0>;
195 compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
200 clock-names = "ipg", "per";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
212 clock-names = "ipg", "per";
217 compatible = "fsl,imx6sl-uart",
218 "fsl,imx6q-uart", "fsl,imx21-uart";
223 clock-names = "ipg", "per";
225 dma-names = "rx", "tx";
230 compatible = "fsl,imx6sl-uart",
231 "fsl,imx6q-uart", "fsl,imx21-uart";
236 clock-names = "ipg", "per";
238 dma-names = "rx", "tx";
243 compatible = "fsl,imx6sl-uart",
244 "fsl,imx6q-uart", "fsl,imx21-uart";
249 clock-names = "ipg", "per";
251 dma-names = "rx", "tx";
256 #sound-dai-cells = <0>;
257 compatible = "fsl,imx6sl-ssi",
258 "fsl,imx51-ssi";
263 clock-names = "ipg", "baud";
266 dma-names = "rx", "tx";
267 fsl,fifo-depth = <15>;
272 #sound-dai-cells = <0>;
273 compatible = "fsl,imx6sl-ssi",
274 "fsl,imx51-ssi";
279 clock-names = "ipg", "baud";
282 dma-names = "rx", "tx";
283 fsl,fifo-depth = <15>;
288 #sound-dai-cells = <0>;
289 compatible = "fsl,imx6sl-ssi",
290 "fsl,imx51-ssi";
295 clock-names = "ipg", "baud";
298 dma-names = "rx", "tx";
299 fsl,fifo-depth = <15>;
304 compatible = "fsl,imx6sl-uart",
305 "fsl,imx6q-uart", "fsl,imx21-uart";
310 clock-names = "ipg", "per";
312 dma-names = "rx", "tx";
317 compatible = "fsl,imx6sl-uart",
318 "fsl,imx6q-uart", "fsl,imx21-uart";
323 clock-names = "ipg", "per";
325 dma-names = "rx", "tx";
331 #pwm-cells = <2>;
332 compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
337 clock-names = "ipg", "per";
341 #pwm-cells = <2>;
342 compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
347 clock-names = "ipg", "per";
351 #pwm-cells = <2>;
352 compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
357 clock-names = "ipg", "per";
361 #pwm-cells = <2>;
362 compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
367 clock-names = "ipg", "per";
371 compatible = "fsl,imx6sl-gpt";
376 clock-names = "ipg", "per";
380 compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
384 gpio-controller;
385 #gpio-cells = <2>;
386 interrupt-controller;
387 #interrupt-cells = <2>;
388 gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
389 <&iomuxc 3 23 1>, <&iomuxc 4 25 1>,
390 <&iomuxc 5 24 1>, <&iomuxc 6 19 1>,
391 <&iomuxc 7 36 2>, <&iomuxc 9 44 8>,
392 <&iomuxc 17 38 6>, <&iomuxc 23 68 4>,
393 <&iomuxc 27 64 4>, <&iomuxc 31 52 1>;
397 compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
401 gpio-controller;
402 #gpio-cells = <2>;
403 interrupt-controller;
404 #interrupt-cells = <2>;
405 gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
406 <&iomuxc 5 34 2>, <&iomuxc 7 57 4>,
407 <&iomuxc 11 56 1>, <&iomuxc 12 61 3>,
408 <&iomuxc 15 107 1>, <&iomuxc 16 132 2>,
409 <&iomuxc 18 135 1>, <&iomuxc 19 134 1>,
410 <&iomuxc 20 108 2>, <&iomuxc 22 120 1>,
411 <&iomuxc 23 125 7>, <&iomuxc 30 110 2>;
415 compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
419 gpio-controller;
420 #gpio-cells = <2>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
423 gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
424 <&iomuxc 12 97 4>, <&iomuxc 16 166 3>,
425 <&iomuxc 19 85 2>, <&iomuxc 21 137 2>,
426 <&iomuxc 23 136 1>, <&iomuxc 24 91 1>,
427 <&iomuxc 25 99 1>, <&iomuxc 26 92 1>,
428 <&iomuxc 27 100 1>, <&iomuxc 28 93 1>,
429 <&iomuxc 29 101 1>, <&iomuxc 30 94 1>,
430 <&iomuxc 31 102 1>;
434 compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
438 gpio-controller;
439 #gpio-cells = <2>;
440 interrupt-controller;
441 #interrupt-cells = <2>;
442 gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
443 <&iomuxc 2 96 1>, <&iomuxc 3 104 1>,
444 <&iomuxc 4 97 1>, <&iomuxc 5 105 1>,
445 <&iomuxc 6 98 1>, <&iomuxc 7 106 1>,
446 <&iomuxc 8 28 1>, <&iomuxc 9 27 1>,
447 <&iomuxc 10 26 1>, <&iomuxc 11 29 1>,
448 <&iomuxc 12 32 1>, <&iomuxc 13 31 1>,
449 <&iomuxc 14 30 1>, <&iomuxc 15 33 1>,
450 <&iomuxc 16 84 1>, <&iomuxc 17 79 2>,
451 <&iomuxc 19 78 1>, <&iomuxc 20 76 1>,
452 <&iomuxc 21 81 2>, <&iomuxc 23 75 1>,
453 <&iomuxc 24 83 1>, <&iomuxc 25 74 1>,
454 <&iomuxc 26 77 1>, <&iomuxc 27 159 1>,
455 <&iomuxc 28 154 1>, <&iomuxc 29 157 1>,
456 <&iomuxc 30 152 1>, <&iomuxc 31 156 1>;
460 compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
464 gpio-controller;
465 #gpio-cells = <2>;
466 interrupt-controller;
467 #interrupt-cells = <2>;
468 gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
469 <&iomuxc 2 155 1>, <&iomuxc 3 153 1>,
470 <&iomuxc 4 150 1>, <&iomuxc 5 149 1>,
471 <&iomuxc 6 144 1>, <&iomuxc 7 147 1>,
472 <&iomuxc 8 142 1>, <&iomuxc 9 146 1>,
473 <&iomuxc 10 148 1>, <&iomuxc 11 141 1>,
474 <&iomuxc 12 145 1>, <&iomuxc 13 143 1>,
475 <&iomuxc 14 140 1>, <&iomuxc 15 139 1>,
476 <&iomuxc 16 164 2>, <&iomuxc 18 160 1>,
477 <&iomuxc 19 162 1>, <&iomuxc 20 163 1>,
478 <&iomuxc 21 161 1>;
482 compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp";
490 compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
497 compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
505 compatible = "fsl,imx6sl-ccm";
509 #clock-cells = <1>;
513 compatible = "fsl,imx6sl-anatop",
514 "fsl,imx6q-anatop",
515 "syscon", "simple-bus";
521 regulator-1p1 {
522 compatible = "fsl,anatop-regulator";
523 regulator-name = "vdd1p1";
524 regulator-min-microvolt = <800000>;
525 regulator-max-microvolt = <1375000>;
526 regulator-always-on;
527 anatop-reg-offset = <0x110>;
528 anatop-vol-bit-shift = <8>;
529 anatop-vol-bit-width = <5>;
530 anatop-min-bit-val = <4>;
531 anatop-min-voltage = <800000>;
532 anatop-max-voltage = <1375000>;
535 regulator-3p0 {
536 compatible = "fsl,anatop-regulator";
537 regulator-name = "vdd3p0";
538 regulator-min-microvolt = <2800000>;
539 regulator-max-microvolt = <3150000>;
540 regulator-always-on;
541 anatop-reg-offset = <0x120>;
542 anatop-vol-bit-shift = <8>;
543 anatop-vol-bit-width = <5>;
544 anatop-min-bit-val = <0>;
545 anatop-min-voltage = <2625000>;
546 anatop-max-voltage = <3400000>;
549 regulator-2p5 {
550 compatible = "fsl,anatop-regulator";
551 regulator-name = "vdd2p5";
552 regulator-min-microvolt = <2100000>;
553 regulator-max-microvolt = <2850000>;
554 regulator-always-on;
555 anatop-reg-offset = <0x130>;
556 anatop-vol-bit-shift = <8>;
557 anatop-vol-bit-width = <5>;
558 anatop-min-bit-val = <0>;
559 anatop-min-voltage = <2100000>;
560 anatop-max-voltage = <2850000>;
563 reg_arm: regulator-vddcore {
564 compatible = "fsl,anatop-regulator";
565 regulator-name = "vddarm";
566 regulator-min-microvolt = <725000>;
567 regulator-max-microvolt = <1450000>;
568 regulator-always-on;
569 anatop-reg-offset = <0x140>;
570 anatop-vol-bit-shift = <0>;
571 anatop-vol-bit-width = <5>;
572 anatop-delay-reg-offset = <0x170>;
573 anatop-delay-bit-shift = <24>;
574 anatop-delay-bit-width = <2>;
575 anatop-min-bit-val = <1>;
576 anatop-min-voltage = <725000>;
577 anatop-max-voltage = <1450000>;
580 reg_pu: regulator-vddpu {
581 compatible = "fsl,anatop-regulator";
582 regulator-name = "vddpu";
583 regulator-min-microvolt = <725000>;
584 regulator-max-microvolt = <1450000>;
585 regulator-always-on;
586 anatop-reg-offset = <0x140>;
587 anatop-vol-bit-shift = <9>;
588 anatop-vol-bit-width = <5>;
589 anatop-delay-reg-offset = <0x170>;
590 anatop-delay-bit-shift = <26>;
591 anatop-delay-bit-width = <2>;
592 anatop-min-bit-val = <1>;
593 anatop-min-voltage = <725000>;
594 anatop-max-voltage = <1450000>;
597 reg_soc: regulator-vddsoc {
598 compatible = "fsl,anatop-regulator";
599 regulator-name = "vddsoc";
600 regulator-min-microvolt = <725000>;
601 regulator-max-microvolt = <1450000>;
602 regulator-always-on;
603 anatop-reg-offset = <0x140>;
604 anatop-vol-bit-shift = <18>;
605 anatop-vol-bit-width = <5>;
606 anatop-delay-reg-offset = <0x170>;
607 anatop-delay-bit-shift = <28>;
608 anatop-delay-bit-width = <2>;
609 anatop-min-bit-val = <1>;
610 anatop-min-voltage = <725000>;
611 anatop-max-voltage = <1450000>;
616 compatible = "fsl,imx6q-tempmon";
619 fsl,tempmon-data = <&ocotp>;
624 compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
632 compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
640 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
643 snvs_rtc: snvs-rtc-lp {
644 compatible = "fsl,sec-v4.0-mon-rtc-lp";
651 snvs_poweroff: snvs-poweroff {
652 compatible = "syscon-poweroff";
671 compatible = "fsl,imx6sl-src", "fsl,imx51-src";
675 #reset-cells = <1>;
679 compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
681 interrupt-controller;
682 #interrupt-cells = <3>;
684 interrupt-parent = <&intc>;
685 pu-supply = <®_pu>;
688 #power-domain-cells = <1>;
691 gpr: iomuxc-gpr@020e0000 { label
692 compatible = "fsl,imx6sl-iomuxc-gpr",
693 "fsl,imx6q-iomuxc-gpr", "syscon";
697 iomuxc: iomuxc@020e0000 { label
698 compatible = "fsl,imx6sl-iomuxc";
713 compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma";
718 clock-names = "ipg", "ahb";
719 #dma-cells = <3>;
720 /* imx6sl reuses imx6q sdma firmware */
721 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
735 compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
741 clock-names = "pix", "axi", "disp_axi";
746 compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
754 aips2: aips-bus@02100000 {
755 compatible = "fsl,aips-bus", "simple-bus";
756 #address-cells = <1>;
757 #size-cells = <1>;
762 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
768 ahb-burst-config = <0x0>;
769 tx-burst-size-dword = <0x10>;
770 rx-burst-size-dword = <0x10>;
775 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
781 ahb-burst-config = <0x0>;
782 tx-burst-size-dword = <0x10>;
783 rx-burst-size-dword = <0x10>;
788 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
794 ahb-burst-config = <0x0>;
795 tx-burst-size-dword = <0x10>;
796 rx-burst-size-dword = <0x10>;
801 #index-cells = <1>;
802 compatible = "fsl,imx6sl-usbmisc", "fsl,imx6q-usbmisc";
808 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
813 clock-names = "ipg", "ahb";
818 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
824 clock-names = "ipg", "ahb", "per";
825 bus-width = <4>;
830 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
836 clock-names = "ipg", "ahb", "per";
837 bus-width = <4>;
842 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
848 clock-names = "ipg", "ahb", "per";
849 bus-width = <4>;
854 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
860 clock-names = "ipg", "ahb", "per";
861 bus-width = <4>;
866 #address-cells = <1>;
867 #size-cells = <0>;
868 compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
876 #address-cells = <1>;
877 #size-cells = <0>;
878 compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
886 #address-cells = <1>;
887 #size-cells = <0>;
888 compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
896 compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
906 #address-cells = <2>;
907 #size-cells = <1>;
910 fsl,weim-cs-gpr = <&gpr>;
915 compatible = "fsl,imx6sl-ocotp", "syscon";
921 compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux";