arm/dts/imx6qdl.dtsi

77 		fsl,tempmon = <&anatop>;
682 			anatop: anatop@20c8000 {  label
683 				compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
690 					compatible = "fsl,anatop-regulator";
695 					anatop-reg-offset = <0x110>;
696 					anatop-vol-bit-shift = <8>;
697 					anatop-vol-bit-width = <5>;
698 					anatop-min-bit-val = <4>;
699 					anatop-min-voltage = <800000>;
700 					anatop-max-voltage = <1375000>;
701 					anatop-enable-bit = <0>;
705 					compatible = "fsl,anatop-regulator";
710 					anatop-reg-offset = <0x120>;
711 					anatop-vol-bit-shift = <8>;
712 					anatop-vol-bit-width = <5>;
713 					anatop-min-bit-val = <0>;
714 					anatop-min-voltage = <2625000>;
715 					anatop-max-voltage = <3400000>;
716 					anatop-enable-bit = <0>;
720 					compatible = "fsl,anatop-regulator";
725 					anatop-reg-offset = <0x130>;
726 					anatop-vol-bit-shift = <8>;
727 					anatop-vol-bit-width = <5>;
728 					anatop-min-bit-val = <0>;
729 					anatop-min-voltage = <2100000>;
730 					anatop-max-voltage = <2875000>;
731 					anatop-enable-bit = <0>;
735 					compatible = "fsl,anatop-regulator";
740 					anatop-reg-offset = <0x140>;
741 					anatop-vol-bit-shift = <0>;
742 					anatop-vol-bit-width = <5>;
743 					anatop-delay-reg-offset = <0x170>;
744 					anatop-delay-bit-shift = <24>;
745 					anatop-delay-bit-width = <2>;
746 					anatop-min-bit-val = <1>;
747 					anatop-min-voltage = <725000>;
748 					anatop-max-voltage = <1450000>;
752 					compatible = "fsl,anatop-regulator";
757 					anatop-reg-offset = <0x140>;
758 					anatop-vol-bit-shift = <9>;
759 					anatop-vol-bit-width = <5>;
760 					anatop-delay-reg-offset = <0x170>;
761 					anatop-delay-bit-shift = <26>;
762 					anatop-delay-bit-width = <2>;
763 					anatop-min-bit-val = <1>;
764 					anatop-min-voltage = <725000>;
765 					anatop-max-voltage = <1450000>;
769 					compatible = "fsl,anatop-regulator";
774 					anatop-reg-offset = <0x140>;
775 					anatop-vol-bit-shift = <18>;
776 					anatop-vol-bit-width = <5>;
777 					anatop-delay-reg-offset = <0x170>;
778 					anatop-delay-bit-shift = <28>;
779 					anatop-delay-bit-width = <2>;
780 					anatop-min-bit-val = <1>;
781 					anatop-min-voltage = <725000>;
782 					anatop-max-voltage = <1450000>;
791 				fsl,anatop = <&anatop>;
799 				fsl,anatop = <&anatop>;