arm/dts/fsl-ls1088a.dtsi

1 // SPDX-License-Identifier: GPL-2.0+ OR X11
10 	interrupt-parent = <&gic>;
11 	#address-cells = <2>;
12 	#size-cells = <2>;
17 		      /* DRAM space - 1, size : 2 GB DRAM */
20 	gic: interrupt-controller@6000000 {
21 		compatible = "arm,gic-v3";
24 		#interrupt-cells = <3>;
25 		interrupt-controller;
26 		interrupts = <1 9 0x4>;
30 		compatible = "arm,armv8-timer";
31 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
32 			     <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
33 			     <1 11 0x8>, /* Virtual PPI, active-low */
34 			     <1 10 0x8>; /* Hypervisor PPI, active-low */
41 		clock-frequency = <0>;	/* Updated by bootloader */
49 		clock-frequency = <0>; 	/* Updated by bootloader */
53 	fsl_mc: fsl-mc@80c000000 {
54 		compatible = "fsl,qoriq-mc";
60 		compatible = "fsl,vf610-dspi";
61 		#address-cells = <1>;
62 		#size-cells = <0>;
64 		interrupts = <0 26 0x4>; /* Level high type */
65 		num-cs = <6>;
69 		compatible = "fsl,vf610-qspi";
70 		#address-cells = <1>;
71 		#size-cells = <0>;
74 		reg-names = "QuadSPI", "QuadSPI-memory";
75 		num-cs = <4>;
81 		interrupts = <0 28 0x4>; /* Level high type */
82 		little-endian;
83 		bus-width = <4>;
87 		compatible = "fsl,ifc", "simple-bus";
89 		interrupts = <0 21 0x4>; /* Level high type */
93 		compatible = "fsl,layerscape-dwc3";
95 		interrupts = <0 80 0x4>; /* Level high type */
100 		compatible = "fsl,layerscape-dwc3";
102 		interrupts = <0 81 0x4>; /* Level high type */
106 	pcie@3400000 {
107 		compatible = "fsl,ls-pcie", "snps,dw-pcie";
112 		reg-names = "dbi", "lut", "ctrl", "config";
113 		#address-cells = <3>;
114 		#size-cells = <2>;
116 		num-lanes = <4>;
117 		bus-range = <0x0 0xff>;
119 			  0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
122 	pcie@3500000 {
123 		compatible = "fsl,ls-pcie", "snps,dw-pcie";
128 		reg-names = "dbi", "lut", "ctrl", "config";
129 		#address-cells = <3>;
130 		#size-cells = <2>;
132 		num-lanes = <4>;
133 		bus-range = <0x0 0xff>;
135 			  0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
138 	pcie@3600000 {
139 		compatible = "fsl,ls-pcie", "snps,dw-pcie";
144 		reg-names = "dbi", "lut", "ctrl", "config";
145 		#address-cells = <3>;
146 		#size-cells = <2>;
148 		num-lanes = <8>;
149 		bus-range = <0x0 0xff>;
151 			  0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
155 		compatible = "fsl,ls1088a-ahci";