Lines Matching +full:phy +full:- +full:reset +full:- +full:duration

1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2017-2018 NXP
6 /dts-v1/;
8 #include "fsl-imx8qxp.dtsi"
9 #include "fsl-imx8qxp-mek-u-boot.dtsi"
13 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";
17 stdout-path = &lpuart0;
20 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
21 compatible = "regulator-fixed";
22 regulator-name = "SD1_SPWR";
23 regulator-min-microvolt = <3000000>;
24 regulator-max-microvolt = <3000000>;
26 off-on-delay = <3480>;
27 enable-active-high;
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_hog>;
35 imx8qxp-mek {
43 pinctrl_ioexp_rst: ioexp-rst-grp {
138 u-boot,dm-pre-reloc;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_lpuart0>;
148 clock-frequency = <100000>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>;
156 #address-cells = <1>;
157 #size-cells = <0>;
158 reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
161 #address-cells = <1>;
162 #size-cells = <0>;
167 #address-cells = <1>;
168 #size-cells = <0>;
173 #address-cells = <1>;
174 #size-cells = <0>;
179 #address-cells = <1>;
180 #size-cells = <0>;
186 gpio-controller;
187 #gpio-cells = <2>;
192 gpio-controller;
193 #gpio-cells = <2>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_usdhc1>;
202 bus-width = <8>;
203 non-removable;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
210 bus-width = <4>;
211 cd-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
212 wp-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
213 vmmc-supply = <&reg_usdhc2_vmmc>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_fec1>;
220 phy-mode = "rgmii";
221 phy-handle = <&ethphy0>;
222 fsl,ar8031-phy-fixup;
223 fsl,magic-packet;
225 phy-reset-gpios = <&pca9557_a 4 GPIO_ACTIVE_LOW>;
226 phy-reset-duration = <10>;
227 phy-reset-post-delay = <150>;
230 #address-cells = <1>;
231 #size-cells = <0>;
233 ethphy0: ethernet-phy@0 {
234 compatible = "ethernet-phy-ieee802.3-c22";
237 ethphy1: ethernet-phy@1 {
238 compatible = "ethernet-phy-ieee802.3-c22";