Lines Matching +full:0 +full:xc7
9 /memreserve/ 0x40000000 0x00020000;
18 bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
24 #size-cells = <0>;
41 pwms = <&pwm2 0 50000>;
53 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
54 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23
55 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
56 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
57 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
58 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
59 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
60 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
61 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
62 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
63 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
64 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
65 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
66 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
67 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
73 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f
74 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f
80 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
81 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
87 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x16
93 MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82
94 MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
95 MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
96 MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
97 MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
98 MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
105 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
106 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
107 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
108 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
109 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
110 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
111 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
112 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
113 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
114 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
115 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
116 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
122 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85
123 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5
124 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5
125 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5
126 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5
127 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5
128 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5
129 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5
130 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5
131 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5
132 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85
133 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
139 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87
140 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7
141 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7
142 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7
143 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7
144 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7
145 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7
146 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7
147 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7
148 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7
149 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87
150 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
156 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
157 MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
163 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
164 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
165 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
166 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
167 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
168 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
169 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
175 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85
176 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5
177 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5
178 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5
179 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5
180 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5
181 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
187 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87
188 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7
189 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7
190 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7
191 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7
192 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7
193 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
199 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
200 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
201 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
202 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
203 MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0xd6
209 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
217 pinctrl-0 = <&pinctrl_fec1>;
225 #size-cells = <0>;
227 ethphy0: ethernet-phy@0 {
229 reg = <0>;
239 pinctrl-0 = <&pinctrl_i2c1>;
244 reg = <0x08>;
332 pinctrl-0 = <&pinctrl_i2c2>;
338 pinctrl-0 = <&pinctrl_pwm2>;
347 display0: display@0 {
364 hsync-active = <0>;
365 vsync-active = <0>;
367 pixelclk-active = <0>;
375 pinctrl-0 = <&pinctrl_qspi>;
378 flash0: n25q256a@0 {
379 reg = <0>;
390 pinctrl-0 = <&pinctrl_usdhc1>;
400 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
411 pinctrl-0 = <&pinctrl_wdog>;