Lines Matching +full:entry +full:- +full:latency +full:- +full:us
17 #address-cells = <2>;
18 #size-cells = <0>;
20 idle-states {
21 entry-method = "psci";
23 CPU_SLEEP: cpu-sleep {
24 compatible = "arm,idle-state";
25 local-timer-stop;
26 arm,psci-suspend-param = <0x0000000>;
27 entry-latency-us = <700>;
28 exit-latency-us = <250>;
29 min-residency-us = <1000>;
32 CLUSTER_SLEEP: cluster-sleep {
33 compatible = "arm,idle-state";
34 local-timer-stop;
35 arm,psci-suspend-param = <0x1000000>;
36 entry-latency-us = <1000>;
37 exit-latency-us = <700>;
38 min-residency-us = <2700>;
39 wakeup-latency-us = <1500>;
43 /* We have 1 clusters having 4 Cortex-A53 cores */
46 compatible = "arm,cortex-a53";
48 enable-method = "psci";
49 next-level-cache = <&A53_L2>;
50 cpu-idle-states = <&CPU_SLEEP>;
55 compatible = "arm,cortex-a53";
57 enable-method = "psci";
58 next-level-cache = <&A53_L2>;
59 cpu-idle-states = <&CPU_SLEEP>;
64 compatible = "arm,cortex-a53";
66 enable-method = "psci";
67 next-level-cache = <&A53_L2>;
68 cpu-idle-states = <&CPU_SLEEP>;
73 compatible = "arm,cortex-a53";
75 enable-method = "psci";
76 next-level-cache = <&A53_L2>;
77 cpu-idle-states = <&CPU_SLEEP>;
80 A53_L2: l2-cache0 {
86 compatible = "arm,psci-1.0";