arm/dts/exynos7420.dtsi

1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
11 #include <dt-bindings/clock/exynos7420-clk.h>
15 	fin_pll: xxti {
16 		compatible = "fixed-clock";
17 		clock-output-names = "fin_pll";
18 		u-boot,dm-pre-reloc;
19 		#clock-cells = <0>;
22 	clock_topc: clock-controller@10570000 {
23 		compatible = "samsung,exynos7-clock-topc";
25 		u-boot,dm-pre-reloc;
26 		#clock-cells = <1>;
28 		clock-names = "fin_pll";
31 	clock_top0: clock-controller@105d0000 {
32 		compatible = "samsung,exynos7-clock-top0";
34 		u-boot,dm-pre-reloc;
35 		#clock-cells = <1>;
40 		clock-names = "fin_pll", "dout_sclk_bus0_pll",
45 	clock_peric1: clock-controller@14c80000 {
46 		compatible = "samsung,exynos7-clock-peric1";
48 		u-boot,dm-pre-reloc;
49 		#clock-cells = <1>;
54 		clock-names = "fin_pll", "dout_aclk_peric1_66",
59 		compatible = "samsung,exynos7420-pinctrl";
61 		u-boot,dm-pre-reloc;
63 		serial2_bus: serial2-bus {
64 			samsung,pins = "gpd1-4", "gpd1-5";
65 			samsung,pin-function = <2>;
66 			samsung,pin-pud = <3>;
67 			samsung,pin-drv = <0>;
68 			u-boot,dm-pre-reloc;
73 		compatible = "samsung,exynos4210-uart";
75 		u-boot,dm-pre-reloc;
78 		clock-names = "uart", "clk_uart_baud0";
79 		pinctrl-names = "default";
80 		pinctrl-0 = <&serial2_bus>;