arm/dts/exynos5.dtsi

20 		reg = <0x10440000 0x1000>;
21 		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
22 				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
23 				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
24 				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
25 				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
26 				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
27 				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
28 				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
35 		reg =	<0x10481000 0x1000>,
36 			<0x10482000 0x1000>,
37 			<0x10484000 0x2000>,
38 			<0x10486000 0x2000>;
39 		interrupts = <1 9 0xf04>;
44 		reg = <0x12250000 0x20>;
46 		#size-cells = <0>;
51 		reg = <0x12C60000 0x100>;
52 		interrupts = <0 56 0>;
54 		#size-cells = <0>;
59 		reg = <0x12C70000 0x100>;
60 		interrupts = <0 57 0>;
62 		#size-cells = <0>;
67 		reg = <0x12C80000 0x100>;
68 		interrupts = <0 58 0>;
70 		#size-cells = <0>;
75 		reg = <0x12C90000 0x100>;
76 		interrupts = <0 59 0>;
78 		#size-cells = <0>;
83 		#size-cells = <0>;
85 		reg = <0x12d20000 0x30>;
86 		interrupts = <0 68 0>;
91 		#size-cells = <0>;
93 		reg = <0x12d30000 0x30>;
94 		interrupts = <0 69 0>;
99 		#size-cells = <0>;
101 		reg = <0x12d40000 0x30>;
103 		interrupts = <0 70 0>;
108 		#size-cells = <0>;
110 		reg = <0x131a0000 0x30>;
111 		interrupts = <0 129 0>;
116 		#size-cells = <0>;
118 		reg = <0x131b0000 0x30>;
119 		interrupts = <0 130 0>;
124 		reg = <0x12110000 0x100>;
130 			reg = <0x12130000 0x100>;
136 		reg = <0x10060000 0x10000>;
142 		reg = <0x14400000 0x10000>;
149 		reg = <0x145b0000 0x1000>;
154 		reg = <0x12000000 0x10000>;
160 			reg = <0x12100000 0x100>;
166 		#size-cells = <0>;
168 		reg = <0x12200000 0x1000>;
169 		interrupts = <0 75 0>;
174 		#size-cells = <0>;
176 		reg = <0x12210000 0x1000>;
177 		interrupts = <0 76 0>;
182 		#size-cells = <0>;
184 		reg = <0x12220000 0x1000>;
185 		interrupts = <0 77 0>;
190 		#size-cells = <0>;
192 		reg = <0x12230000 0x1000>;
193 		interrupts = <0 78 0>;
198 		reg = <0x12C00000 0x100>;
199 		interrupts = <0 51 0>;
200 		id = <0>;
205 		reg = <0x12C10000 0x100>;
206 		interrupts = <0 52 0>;
212 		reg = <0x12C20000 0x100>;
213 		interrupts = <0 53 0>;
219 		reg = <0x12C30000 0x100>;
220 		interrupts = <0 54 0>;