arm/dts/dra72-evm-common.dtsi

2  * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/clk/ti-dra7-atl.h>
15 	compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
22 		stdout-path = &uart1;
25 	evm_12v0: fixedregulator-evm12v0 {
26 		/* main supply */
27 		compatible = "regulator-fixed";
28 		regulator-name = "evm_12v0";
29 		regulator-min-microvolt = <12000000>;
30 		regulator-max-microvolt = <12000000>;
31 		regulator-always-on;
32 		regulator-boot-on;
35 	evm_5v0: fixedregulator-evm5v0 {
36 		/* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
37 		/* Output 1 of LM5140QRWGTQ1 on dra71-evm */
38 		compatible = "regulator-fixed";
39 		regulator-name = "evm_5v0";
40 		regulator-min-microvolt = <5000000>;
41 		regulator-max-microvolt = <5000000>;
42 		vin-supply = <&evm_12v0>;
43 		regulator-always-on;
44 		regulator-boot-on;
47 	vsys_3v3: fixedregulator-vsys3v3 {
48 		/* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
49 		/* Output 2 of LM5140QRWGTQ1 on dra71-evm */
50 		compatible = "regulator-fixed";
51 		regulator-name = "vsys_3v3";
52 		regulator-min-microvolt = <3300000>;
53 		regulator-max-microvolt = <3300000>;
54 		vin-supply = <&evm_12v0>;
55 		regulator-always-on;
56 		regulator-boot-on;
59 	evm_3v3_sw: fixedregulator-evm_3v3 {
61 		compatible = "regulator-fixed";
62 		regulator-name = "evm_3v3";
63 		regulator-min-microvolt = <3300000>;
64 		regulator-max-microvolt = <3300000>;
65 		vin-supply = <&vsys_3v3>;
66 		regulator-always-on;
67 		regulator-boot-on;
70 	aic_dvdd: fixedregulator-aic_dvdd {
72 		compatible = "regulator-fixed";
73 		regulator-name = "aic_dvdd";
74 		vin-supply = <&evm_3v3_sw>;
75 		regulator-min-microvolt = <1800000>;
76 		regulator-max-microvolt = <1800000>;
79 	evm_3v3_sd: fixedregulator-sd {
80 		compatible = "regulator-fixed";
81 		regulator-name = "evm_3v3_sd";
82 		regulator-min-microvolt = <3300000>;
83 		regulator-max-microvolt = <3300000>;
84 		vin-supply = <&evm_3v3_sw>;
85 		enable-active-high;
90 		compatible = "linux,extcon-usb-gpio";
91 		id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
95 		compatible = "linux,extcon-usb-gpio";
96 		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
100 		compatible = "hdmi-connector";
107 				remote-endpoint = <&tpd12s015_out>;
120 			#address-cells = <1>;
121 			#size-cells = <0>;
127 					remote-endpoint = <&hdmi_out>;
135 					remote-endpoint = <&hdmi_connector_in>;
142 		compatible = "simple-audio-card";
143 		simple-audio-card,name = "DRA7xx-EVM";
144 		simple-audio-card,widgets =
149 		simple-audio-card,routing =
159 		simple-audio-card,format = "dsp_b";
160 		simple-audio-card,bitclock-master = <&sound0_master>;
161 		simple-audio-card,frame-master = <&sound0_master>;
162 		simple-audio-card,bitclock-inversion;
164 		sound0_master: simple-audio-card,cpu {
165 			sound-dai = <&mcasp3>;
166 			system-clock-frequency = <5644800>;
169 		simple-audio-card,codec {
170 			sound-dai = <&tlv320aic3106>;
178 		pinctrl-single,pins = <
190 		pinctrl-single,pins = <
205 		pinctrl-single,pins = <
212 		pinctrl-single,pins = <
221 	clock-frequency = <400000>;
226 		gpio-controller;
227 		#gpio-cells = <2>;
228 		interrupt-controller;
229 		#interrupt-cells = <2>;
235 		lines-initial-states = <0x1408>;
236 		gpio-controller;
237 		#gpio-cells = <2>;
238 		interrupt-controller;
239 		#interrupt-cells = <2>;
243 		#sound-dai-cells = <0>;
246 		adc-settle-ms = <40>;
247 		ai3x-micbias-vg = <1>;		/* 2.0V */
251 		AVDD-supply = <&evm_3v3_sw>;
252 		IOVDD-supply = <&evm_3v3_sw>;
253 		DRVDD-supply = <&evm_3v3_sw>;
254 		DVDD-supply = <&aic_dvdd>;
260 	clock-frequency = <400000>;
265 		gpio-controller;
266 		#gpio-cells = <2>;
273 		lines-initial-states = <0x0f2b>;
277 			gpio-hog;
279 			output-low;
280 			line-name = "vin6_sel_s0";
287 	interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
297 	 * For the existing IOdelay configuration via U-Boot we don't
298 	 * support NAND on dra72-evm. Keep it disabled. Enabling it
299 	 * requires a different configuration by U-Boot.
308 		compatible = "ti,omap2-nand";
310 		interrupt-parent = <&gpmc>;
313 		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
314 		ti,nand-xfer-type = "prefetch-dma";
315 		ti,nand-ecc-opt = "bch8";
316 		ti,elm-id = <&elm>;
317 		nand-bus-width = <16>;
318 		gpmc,device-width = <2>;
319 		gpmc,sync-clk-ps = <0>;
320 		gpmc,cs-on-ns = <0>;
321 		gpmc,cs-rd-off-ns = <80>;
322 		gpmc,cs-wr-off-ns = <80>;
323 		gpmc,adv-on-ns = <0>;
324 		gpmc,adv-rd-off-ns = <60>;
325 		gpmc,adv-wr-off-ns = <60>;
326 		gpmc,we-on-ns = <10>;
327 		gpmc,we-off-ns = <50>;
328 		gpmc,oe-on-ns = <4>;
329 		gpmc,oe-off-ns = <40>;
330 		gpmc,access-ns = <40>;
331 		gpmc,wr-access-ns = <80>;
332 		gpmc,rd-cycle-ns = <80>;
333 		gpmc,wr-cycle-ns = <80>;
334 		gpmc,bus-turnaround-ns = <0>;
335 		gpmc,cycle2cycle-delay-ns = <0>;
336 		gpmc,clk-activation-ns = <0>;
337 		gpmc,wr-data-mux-bus-ns = <0>;
339 		/* All SPL-* partitions are sized to minimal length
341 		 * NAND flash this is equal to size of erase-block */
342 		#address-cells = <1>;
343 		#size-cells = <1>;
361 			label = "NAND.u-boot-spl-os";
365 			label = "NAND.u-boot";
369 			label = "NAND.u-boot-env";
373 			label = "NAND.u-boot-env.backup1";
381 			label = "NAND.file-system";
406 	pinctrl-names = "default";
407 	pinctrl-0 = <&mmc1_pins_default>;
408 	vmmc-supply = <&evm_3v3_sd>;
409 	bus-width = <4>;
411 	 * SDCD signal is not being used here - using the fact that GPIO mode
414 	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
415 	max-frequency = <192000000>;
419 	/* SW5-3 in ON position */
421 	pinctrl-names = "default";
422 	pinctrl-0 = <&mmc2_pins_default>;
423 	bus-width = <8>;
424 	ti,non-removable;
425 	max-frequency = <192000000>;
434 	pinctrl-names = "default", "sleep", "active";
435 	pinctrl-0 = <&dcan1_pins_sleep>;
436 	pinctrl-1 = <&dcan1_pins_sleep>;
437 	pinctrl-2 = <&dcan1_pins_default>;
443 	spi-max-frequency = <76800000>;
446 		spi-max-frequency = <76800000>;
448 		spi-tx-bus-width = <1>;
449 		spi-rx-bus-width = <4>;
450 		#address-cells = <1>;
451 		#size-cells = <1>;
475 			label = "QSPI.u-boot";
479 			label = "QSPI.u-boot-spl-os";
483 			label = "QSPI.u-boot-env";
487 			label = "QSPI.u-boot-env.backup1";
495 			label = "QSPI.file-system";
510 			remote-endpoint = <&tpd12s015_in>;
516 	assigned-clocks = <&abe_dpll_sys_clk_mux>,
521 	assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
522 	assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
533 	#sound-dai-cells = <0>;
535 	assigned-clocks = <&mcasp3_ahclkx_mux>;
536 	assigned-clock-parents = <&atl_clkin2_ck>;
540 	op-mode = <0>;          /* MCASP_IIS_MODE */
541 	tdm-slots = <2>;
543 	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
546 	tx-num-evt = <32>;
547 	rx-num-evt = <32>;