Lines Matching +full:0 +full:x11800000
20 reg = <0xc0000000 0x0>;
32 reg = <0xfffee000 0x2000>;
38 #clock-cells = <0>;
43 #clock-cells = <0>;
49 #clock-cells = <0>;
56 reg = <0x11800000 0x40000>,
57 <0x11e00000 0x8000>,
58 <0x11f00000 0x8000>,
59 <0x01c14044 0x4>,
60 <0x01c14174 0x8>;
73 ranges = <0x0 0x01c00000 0x400000>;
78 reg = <0x10000 0x1000>;
91 reg = <0x11000 0x1000>;
96 #clock-cells = <0>;
102 #clock-cells = <0>;
105 #clock-cells = <0>;
110 reg = <0x14120 0x50>;
114 pinctrl-single,function-mask = <0xf>;
116 pinctrl-single,gpio-range = <&range 0 17 0x8>,
117 <&range 17 8 0x4>,
118 <&range 26 8 0x4>,
119 <&range 34 80 0x8>,
120 <&range 129 31 0x8>;
130 0x0c 0x22000000 0xff000000
136 0x0c 0x00220000 0x00ff0000
142 0x00 0x00440000 0x00ff0000
148 0x10 0x22000000 0xff000000
154 0x00 0x44000000 0xff000000
160 0x10 0x00220000 0x00ff0000
166 0x10 0x00002200 0x0000ff00
172 0x10 0x00440000 0x00ff0000
178 * MMCSD0_DAT[1] MMCSD0_DAT[0]
181 0x28 0x00222222 0x00ffffff
187 0xc 0x00000002 0x0000000f
193 0xc 0x00000020 0x000000f0
199 0x14 0x00000002 0x0000000f
205 0x14 0x00000020 0x000000f0
211 0x8 0x20000000 0xf0000000
217 0x4 0x40000000 0xf0000000
223 0x4 0x00000004 0x0000000f
229 0xc 0x00001101 0x0000ff0f
235 0x10 0x00000010 0x000000f0
241 0xc 0x01000000 0x0f000000
247 0x14 0x00110100 0x00ff0f00
253 0x14 0x00000010 0x000000f0
259 0x10 0x00000088 0x000000ff
269 0x8 0x88888880 0xfffffff0
275 0xc 0x88888888 0xffffffff
284 0x40 0x22222200 0xffffff00
287 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
289 0x44 0x22222222 0xffffffff
291 0x48 0x00000022 0x000000ff
294 0x48 0x02000000 0x0f000000
296 0x4c 0x02000022 0x0f0000ff
302 0x38 0x11111111 0xffffffff
303 /* VP_DIN[10..15,0..1] */
304 0x3c 0x11111111 0xffffffff
306 0x40 0x00000011 0x000000ff
312 0x40 0x11111100 0xffffff00
313 /* VP_DOUT[10..15,0..1] */
314 0x44 0x11111111 0xffffffff
316 0x48 0x00000011 0x000000ff
321 0x4c 0x00111100 0x00ffff00
327 reg = <0x14110 0x0c>;
332 reg = <0x1417c 0x14>;
337 clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>;
350 #clock-cells = <0>;
356 #clock-cells = <0>;
362 #clock-cells = <0>;
368 #clock-cells = <0>;
373 edma0: edma@0 {
375 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
376 reg = <0x0 0x8000>;
382 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
383 power-domains = <&psc0 0>;
387 reg = <0x8000 0x400>;
394 reg = <0x8400 0x400>;
401 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
402 reg = <0x230000 0x8000>;
409 power-domains = <&psc1 0>;
413 reg = <0x238000 0x400>;
420 reg = <0x42000 0x100>;
430 reg = <0x10c000 0x100>;
440 reg = <0x10d000 0x100>;
450 reg = <0x23000 0x1000>;
459 reg = <0x22000 0x1000>;
462 #size-cells = <0>;
468 reg = <0x228000 0x1000>;
471 #size-cells = <0>;
478 reg = <0x20000 0x1000>;
485 reg = <0x21000 0x1000>;
491 reg = <0x40000 0x1000>;
495 dmas = <&edma0 16 0>, <&edma0 17 0>;
502 reg = <0x217000 0x1000>;
508 port@0 {
510 #size-cells = <0>;
516 #size-cells = <0>;
521 reg = <0x21b000 0x1000>;
525 dmas = <&edma1 28 0>, <&edma1 29 0>;
534 reg = <0x300000 0x2000>;
544 reg = <0x302000 0x2000>;
554 reg = <0x306000 0x80>;
564 reg = <0x307000 0x80>;
574 reg = <0x308000 0x80>;
582 #size-cells = <0>;
584 reg = <0x41000 0x1000>;
588 dmas = <&edma0 14 0>, <&edma0 15 0>;
596 #size-cells = <0>;
598 reg = <0x30e000 0x1000>;
602 dmas = <&edma0 18 0>, <&edma0 19 0>;
610 reg = <0x200000 0x1000>;
615 phys = <&usb_phy 0>;
624 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
625 &cppi41dma 2 0 &cppi41dma 3 0
626 &cppi41dma 0 1 &cppi41dma 1 1
634 reg = <0x201000 0x1000
635 0x202000 0x1000
636 0x204000 0x4000>;
648 reg = <0x218000 0x2000>, <0x22c018 0x4>;
656 reg = <0x21a000 0x1000>;
664 #clock-cells = <0>;
670 #size-cells = <0>;
671 reg = <0x224000 0x1000>;
679 reg = <0x220000 0x4000>;
680 ti,davinci-ctrl-reg-offset = <0x3000>;
681 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
682 ti,davinci-ctrl-ram-offset = <0>;
683 ti,davinci-ctrl-ram-size = <0x2000>;
696 reg = <0x225000 0x1000>;
707 reg = <0x226000 0x1000>;
710 ti,davinci-gpio-unbanked = <0>;
716 gpio-ranges = <&pmx_core 0 15 1>,
731 <&pmx_core 15 0 1>,
863 reg = <0x227000 0x1000>;
874 reg = <0x22c00c 0x8>;
880 reg = <0x100000 0x2000>,
881 <0x102000 0x400000>;
888 <&edma0 0 1>;
894 reg = <0x213000 0x1000>;
908 reg = <0x68000000 0x00008000>;
909 ranges = <0 0 0x60000000 0x08000000
910 1 0 0x68000000 0x00008000>;
918 reg = <0xb0000000 0xe8>;