Lines Matching +full:0 +full:xfffffd40

44 		reg = <0x20000000 0x08000000>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
63 reg = <0x00300000 0x28000>;
75 reg = <0x00500000 0x100000>;
82 fb0: fb@0x00600000 {
84 reg = <0x00600000 0x1000>;
87 pinctrl-0 = <&pinctrl_fb>;
97 reg = <0x40000000 0x10000000>;
101 pinctrl-0 = <&pinctrl_nand>;
105 <0>;
118 reg = <0xfffa0000 0x100>;
119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
120 <18 IRQ_TYPE_LEVEL_HIGH 0>,
121 <19 IRQ_TYPE_LEVEL_HIGH 0>;
128 reg = <0xfffa4000 0x4000>;
138 reg = <0xfffa8000 0x600>;
139 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
141 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
143 #size-cells = <0>;
152 pinctrl-0 = <&pinctrl_i2c_twi>;
153 reg = <0xfffac000 0x100>;
156 #size-cells = <0>;
163 reg = <0xfffb0000 0x200>;
168 pinctrl-0 = <&pinctrl_usart0>;
176 reg = <0xfffb4000 0x200>;
181 pinctrl-0 = <&pinctrl_usart1>;
189 reg = <0xfffb8000 0x200>;
194 pinctrl-0 = <&pinctrl_usart2>;
202 reg = <0xfffbc000 0x4000>;
205 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
213 reg = <0xfffc0000 0x4000>;
216 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
224 reg = <0xfffc4000 0x4000>;
227 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
235 #size-cells = <0>;
237 reg = <0xfffc8000 0x200>;
238 cs-gpios = <0>, <0>, <0>, <0>;
241 pinctrl-0 = <&pinctrl_spi0>;
249 #size-cells = <0>;
251 reg = <0xfffcc000 0x200>;
254 pinctrl-0 = <&pinctrl_spi1>;
262 reg = <0xffffea00 0x200>;
267 reg = <0xffffee00 0x200>;
274 reg = <0xfffff000 0x200>;
280 reg = <0xfffff200 0x200>;
283 pinctrl-0 = <&pinctrl_dbgu>;
291 reg = <0xfffff400 0x200>;
303 reg = <0xfffff600 0x200>;
315 reg = <0xfffff800 0x200>;
329 ranges = <0xfffff400 0xfffff400 0x600>;
330 reg = <0xfffff400 0x200 /* pioA */
331 0xfffff600 0x200 /* pioB */
332 0xfffff800 0x200 /* pioC */
336 <0xffffffff 0xfffffff7>, /* pioA */
337 <0xffffffff 0xfffffff4>, /* pioB */
338 <0xffffffff 0xffffff07>; /* pioC */
344 pinctrl_dbgu: dbgu-0 {
352 pinctrl_usart0: usart0-0 {
358 pinctrl_usart0_rts: usart0_rts-0 {
363 pinctrl_usart0_cts: usart0_cts-0 {
370 pinctrl_usart1: usart1-0 {
376 pinctrl_usart1_rts: usart1_rts-0 {
381 pinctrl_usart1_cts: usart1_cts-0 {
388 pinctrl_usart2: usart2-0 {
394 pinctrl_usart2_rts: usart2_rts-0 {
399 pinctrl_usart2_cts: usart2_cts-0 {
406 pinctrl_nand: nand-0 {
414 pinctrl_mmc0_clk: mmc0_clk-0 {
419 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
422 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
425 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
434 pinctrl_ssc0_tx: ssc0_tx-0 {
441 pinctrl_ssc0_rx: ssc0_rx-0 {
450 pinctrl_ssc1_tx: ssc1_tx-0 {
457 pinctrl_ssc1_rx: ssc1_rx-0 {
466 pinctrl_ssc2_tx: ssc2_tx-0 {
473 pinctrl_ssc2_rx: ssc2_rx-0 {
482 pinctrl_spi0: spi0-0 {
484 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
491 pinctrl_spi1: spi1-0 {
500 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
504 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
508 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
512 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
516 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
520 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
524 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
528 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
532 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
538 pinctrl_i2c_bitbang: i2c-0-bitbang {
543 pinctrl_i2c_twi: i2c-0-twi {
551 pinctrl_fb: fb-0 {
580 reg = <0xfffffc00 0x100>;
584 #size-cells = <0>;
590 #clock-cells = <0>;
597 #clock-cells = <0>;
601 plla: pllack@0 {
603 #clock-cells = <0>;
606 reg = <0>;
609 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
615 #clock-cells = <0>;
626 #clock-cells = <0>;
629 atmel,clk-output-range = <0 94000000>;
630 atmel,clk-divisors = <1 2 4 0>;
636 #clock-cells = <0>;
637 atmel,clk-divisors = <1 2 4 0>;
644 #size-cells = <0>;
648 prog0: progi@0 {
649 #clock-cells = <0>;
650 reg = <0>;
651 interrupts = <AT91_PMC_PCKRDY(0)>;
655 #clock-cells = <0>;
661 #clock-cells = <0>;
667 #clock-cells = <0>;
676 #size-cells = <0>;
679 #clock-cells = <0>;
685 #clock-cells = <0>;
691 #clock-cells = <0>;
697 #clock-cells = <0>;
703 #clock-cells = <0>;
709 #clock-cells = <0>;
715 #clock-cells = <0>;
721 #clock-cells = <0>;
730 #size-cells = <0>;
735 #clock-cells = <0>;
741 #clock-cells = <0>;
747 #clock-cells = <0>;
753 #clock-cells = <0>;
758 #clock-cells = <0>;
763 #clock-cells = <0>;
768 #clock-cells = <0>;
773 #clock-cells = <0>;
779 #clock-cells = <0>;
783 #clock-cells = <0>;
788 #clock-cells = <0>;
793 #clock-cells = <0>;
798 #clock-cells = <0>;
803 #clock-cells = <0>;
808 #clock-cells = <0>;
813 #clock-cells = <0>;
818 #clock-cells = <0>;
823 #clock-cells = <0>;
828 #clock-cells = <0>;
836 reg = <0xfffffd00 0x10>;
842 reg = <0xfffffd10 0x10>;
848 reg = <0xfffffd30 0xf>;
855 reg = <0xfffffd20 0x10>;
863 reg = <0xfffffd40 0x10>;
871 reg = <0xfffffd50 0x10>;
877 i2c@0 {
880 pinctrl-0 = <&pinctrl_i2c_bitbang>;
887 #size-cells = <0>;