Lines Matching +full:0 +full:x1e650000
47 #size-cells = <0>;
50 cpu@0 {
53 reg = <0>;
79 size = <0x01000000>;
80 alignment = <0x01000000>;
86 size = <0x04000000>;
87 alignment = <0x01000000>;
106 reg = <0x40461000 0x1000>,
107 <0x40462000 0x1000>,
108 <0x40464000 0x2000>,
109 <0x40466000 0x2000>;
114 reg = < 0x1e600000 0x100>;
118 reg = <0x1e620000 0xc4
119 0x20000000 0x10000000>;
121 #size-cells = <0>;
127 flash@0 {
128 reg = < 0 >;
145 reg = <0x1e630000 0xc4
146 0x30000000 0x10000000>;
148 #size-cells = <0>;
153 flash@0 {
154 reg = < 0 >;
166 reg = <0x1e631000 0xc4
167 0x50000000 0x10000000>;
169 #size-cells = <0>;
174 flash@0 {
175 reg = < 0 >;
193 reg = <0x1e6e0000 0x174>;
194 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
199 reg = <0x1e650000 0x40>;
206 reg = <0x1e660000 0x180>, <0x1e650000 0x4>;
214 reg = <0x1e680000 0x180>, <0x1e650008 0x4>;
216 #size-cells = <0>;
224 reg = <0x1e670000 0x180>, <0x1e650010 0x4>;
226 #size-cells = <0>;
234 reg = <0x1e690000 0x180>, <0x1e650018 0x4>;
236 #size-cells = <0>;
244 reg = <0x1e6a0000 0x350>;
249 pinctrl-0 = <&pinctrl_usb2ad_default>;
255 reg = <0x1e6a1000 0x100>;
259 pinctrl-0 = <&pinctrl_usb2ah_default>;
265 reg = <0x1e6a3000 0x100>;
269 pinctrl-0 = <&pinctrl_usb2bh_default>;
282 reg = <0x1e6e2000 0x1000>;
287 ranges = <0 0x1e6e2000 0x1000>;
300 scu_ic0: interrupt-controller@0 {
303 reg = <0x560 0x10>;
312 reg = <0x570 0x10>;
322 reg = <0x1e6d0000 0x200>;
331 reg = <0x1e6fa000 0x1000>,
332 <0x1e710000 0x20000>;
339 smp-memram@0 {
341 reg = <0x1e6e2180 0x40>;
346 reg = <0x1e6e6000 0x1000>;
353 reg = <0x1e740000 0x1000>;
360 ranges = <0x0 0x1e740000 0x1000>;
364 reg = <0x100 0x100>;
365 interrupts = <0>;
374 reg = <0x200 0x100>;
386 reg = <0x1e750000 0x1000>;
393 ranges = <0x0 0x1e750000 0x1000>;
397 reg = <0x100 0x100>;
398 interrupts = <0>;
407 reg = <0x1e6ed000 0x100>;
410 pinctrl-0 = <&pinctrl_pcie0rc_default>;
416 reg = <0x1e6ed200 0x100>;
419 pinctrl-0 = <&pinctrl_pcie1rc_default>;
427 reg = <0x1e770000 0x100>;
428 ranges = <0x81000000 0x0 0x0 0x0 0x0 0x10000 /* downstream I/O */
429 0x82000000 0x0 0x60000000 0x60000000 0x0 0x20000000>; /* non-prefetchable memory */
431 bus-range = <0x00 0xff>;
440 reg = <0x1e780000 0x400>;
445 gpio-ranges = <&pinctrl 0 0 208>;
451 reg = <0x1e780800 0x800>;
456 gpio-ranges = <&pinctrl 0 208 36>;
462 reg = <0x1e783000 0x20>;
470 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
476 reg = <0x1e784000 0x1000>;
488 reg = <0x1e785000 0x40>;
493 reg = <0x1e785040 0x40>;
498 reg = <0x1e785080 0x40>;
503 reg = <0x1e7850C0 0x40>;
508 reg = <0x1e789000 0x200>;
512 ranges = <0x0 0x1e789000 0x1000>;
514 lpc_bmc: lpc-bmc@0 {
516 reg = <0x0 0x80>;
520 ranges = <0x0 0x0 0x80>;
522 kcs1: kcs1@0 {
524 reg = <0x0 0x80>;
527 kcs_addr = <0xCA0>;
531 kcs2: kcs2@0 {
533 reg = <0x0 0x80>;
536 kcs_addr = <0xCA8>;
540 kcs3: kcs3@0 {
542 reg = <0x0 0x80>;
545 kcs_addr = <0xCA2>;
548 kcs4: kcs4@0 {
550 reg = <0x0 0x120>;
553 kcs_addr = <0xCA4>;
561 reg = <0x80 0x1e0>;
566 ranges = <0x0 0x80 0x1e0>;
568 lpc_ctrl: lpc-ctrl@0 {
570 reg = <0x0 0x80>;
574 lpc_snoop: lpc-snoop@0 {
576 reg = <0x0 0x80>;
578 snoop-ports = <0x80>;
584 reg = <0x20 0x24 0x48 0x8>;
589 reg = <0x18 0x4>;
596 reg = <0xc0 0x18>;
607 reg = <0x180 0x5c>;
617 reg = <0x1e78d000 0x20>;
624 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
631 reg = <0x1e78e000 0x20>;
638 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
645 reg = <0x1e78f000 0x20>;
653 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
661 ranges = <0 0x1e78a000 0x1000>;
666 reg = <0x1e79b000 0x94>;
669 pinctrl-0 = <&pinctrl_fsi1_default>;
676 reg = <0x1e79b100 0x94>;
679 pinctrl-0 = <&pinctrl_fsi2_default>;
686 reg = <0x1e790000 0x20>;
697 reg = <0x1e790100 0x20>;
708 reg = <0x1e790200 0x20>;
719 reg = <0x1e790300 0x20>;
730 reg = <0x1e790400 0x20>;
741 reg = <0x1e790400 0x20>;
752 reg = <0x1e790600 0x20>;
763 reg = <0x1e790700 0x20>;
774 reg = <0x1e6eb000 0x200>;
789 reg = <0x0 0x40>;
795 #size-cells = <0>;
798 reg = <0x80 0x80 0xC00 0x20>;
804 pinctrl-0 = <&pinctrl_i2c1_default>;
810 #size-cells = <0>;
813 reg = <0x100 0x80 0xC20 0x20>;
819 pinctrl-0 = <&pinctrl_i2c2_default>;
825 #size-cells = <0>;
828 reg = <0x180 0x80 0xC40 0x20>;
834 pinctrl-0 = <&pinctrl_i2c3_default>;
839 #size-cells = <0>;
842 reg = <0x200 0x40 0xC60 0x20>;
848 pinctrl-0 = <&pinctrl_i2c4_default>;
853 #size-cells = <0>;
856 reg = <0x280 0x80 0xC80 0x20>;
862 pinctrl-0 = <&pinctrl_i2c5_default>;
867 #size-cells = <0>;
870 reg = <0x300 0x40 0xCA0 0x20>;
876 pinctrl-0 = <&pinctrl_i2c6_default>;
881 #size-cells = <0>;
884 reg = <0x380 0x80 0xCC0 0x20>;
890 pinctrl-0 = <&pinctrl_i2c7_default>;
895 #size-cells = <0>;
898 reg = <0x400 0x80 0xCE0 0x20>;
904 pinctrl-0 = <&pinctrl_i2c8_default>;
909 #size-cells = <0>;
912 reg = <0x480 0x80 0xD00 0x20>;
918 pinctrl-0 = <&pinctrl_i2c9_default>;
923 #size-cells = <0>;
926 reg = <0x500 0x80 0xD20 0x20>;
932 pinctrl-0 = <&pinctrl_i2c10_default>;
938 #size-cells = <0>;
941 reg = <0x580 0x80 0xD40 0x20>;
947 pinctrl-0 = <&pinctrl_i2c11_default>;
953 #size-cells = <0>;
956 reg = <0x600 0x80 0xD60 0x20>;
962 pinctrl-0 = <&pinctrl_i2c12_default>;
968 #size-cells = <0>;
971 reg = <0x680 0x80 0xD80 0x20>;
977 pinctrl-0 = <&pinctrl_i2c13_default>;
983 #size-cells = <0>;
986 reg = <0x700 0x80 0xDA0 0x20>;
992 pinctrl-0 = <&pinctrl_i2c14_default>;
998 #size-cells = <0>;
1001 reg = <0x780 0x80 0xDC0 0x20>;
1007 pinctrl-0 = <&pinctrl_i2c15_default>;
1013 #size-cells = <0>;
1016 reg = <0x800 0x80 0xDE0 0x20>;
1022 pinctrl-0 = <&pinctrl_i2c16_default>;