Lines Matching +full:orion +full:- +full:sdio
4 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/comphy/comphy_data.h>
50 cp110-master {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
57 config-space {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "simple-bus";
61 interrupt-parent = <&gic>;
65 compatible = "marvell,armada-7k-pp22";
68 clock-names = "pp_clk", "gop_clk", "mg_clk";
70 dma-coherent;
74 port-id = <0>;
75 gop-port-id = <0>;
81 port-id = <1>;
82 gop-port-id = <2>;
88 port-id = <2>;
89 gop-port-id = <3>;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 compatible = "marvell,orion-mdio";
101 cpm_syscon0: system-controller@440000 {
102 compatible = "marvell,cp110-system-controller0",
105 #clock-cells = <2>;
106 core-clock-output-names =
107 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
108 "cpm-core", "cpm-nand-core";
109 gate-clock-output-names =
110 "cpm-audio", "cpm-communit", "cpm-nand",
111 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
112 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
113 "cpm-gop-dp", "none", "cpm-pcie_x10",
114 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
115 "cpm-sata", "cpm-sata-usb", "cpm-main",
116 "cpm-sd-mmc", "none", "none",
117 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
118 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
121 cpm_pinctl: cpm-pinctl@440000 {
122 compatible = "marvell,mvebu-pinctrl",
123 "marvell,armada-7k-pinctrl",
124 "marvell,armada-8k-cpm-pinctrl";
125 bank-name ="cp0-110";
127 pin-count = <63>;
128 max-func = <0xf>;
130 cpm_i2c0_pins: cpm-i2c-pins-0 {
134 cpm_i2c1_pins: cpm-i2c-pins-1 {
138 cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
143 pca0_pins: cpm-pca0_pins {
147 cpm_sdhci_pins: cpm-sdhi-pins-0 {
151 cpm_spi0_pins: cpm-spi-pins-0 {
158 compatible = "marvell,orion-gpio";
162 gpio-controller;
163 #gpio-cells = <2>;
167 compatible = "marvell,orion-gpio";
171 gpio-controller;
172 #gpio-cells = <2>;
176 compatible = "marvell,armada-8k-ahci";
184 compatible = "marvell,armada-8k-xhci",
185 "generic-xhci";
187 dma-coherent;
194 compatible = "marvell,armada-8k-xhci",
195 "generic-xhci";
197 dma-coherent;
204 compatible = "marvell,armada-380-spi";
206 #address-cells = <0x1>;
207 #size-cells = <0x0>;
208 cell-index = <1>;
214 compatible = "marvell,armada-380-spi";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 cell-index = <2>;
224 compatible = "marvell,mv78230-i2c";
226 #address-cells = <1>;
227 #size-cells = <0>;
234 compatible = "marvell,mv78230-i2c";
236 #address-cells = <1>;
237 #size-cells = <0>;
244 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
247 mux-bitcount = <4>;
248 max-lanes = <6>;
252 compatible = "marvell,mvebu-utmi-2.6.0";
253 reg = <0x580000 0x1000>, /* utmi-unit */
254 <0x440420 0x4>, /* usb-cfg */
255 <0x440440 0x4>; /* utmi-cfg */
256 utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
261 compatible = "marvell,mvebu-utmi-2.6.0";
262 reg = <0x581000 0x1000>, /* utmi-unit */
263 <0x440420 0x4>, /* usb-cfg */
264 <0x440444 0x4>; /* utmi-cfg */
265 utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
270 compatible = "marvell,armada-8k-sdhci";
273 dma-coherent;
278 compatible = "marvell,mvebu-pxa3xx-nand";
280 #address-cells = <1>;
283 nand-enable-arbiter;
284 num-cs = <1>;
285 nand-ecc-strength = <4>;
286 nand-ecc-step-size = <512>;
293 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
296 reg-names = "ctrl", "config";
297 #address-cells = <3>;
298 #size-cells = <2>;
299 #interrupt-cells = <1>;
301 dma-coherent;
303 bus-range = <0 0xff>;
307 /* non-prefetchable memory */
309 interrupt-map-mask = <0 0 0 0>;
310 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
312 num-lanes = <1>;
318 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
321 reg-names = "ctrl", "config";
322 #address-cells = <3>;
323 #size-cells = <2>;
324 #interrupt-cells = <1>;
326 dma-coherent;
328 bus-range = <0 0xff>;
332 /* non-prefetchable memory */
334 interrupt-map-mask = <0 0 0 0>;
335 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
338 num-lanes = <1>;
344 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
347 reg-names = "ctrl", "config";
348 #address-cells = <3>;
349 #size-cells = <2>;
350 #interrupt-cells = <1>;
352 dma-coherent;
354 bus-range = <0 0xff>;
358 /* non-prefetchable memory */
360 interrupt-map-mask = <0 0 0 0>;
361 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
364 num-lanes = <1>;