arm/dts/armada-388-clearfog.dts

11  * This file is dual-licensed: you can use it either under the terms
49 /dts-v1/;
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/gpio/gpio.h>
52 #include "armada-388.dtsi"
53 #include "armada-38x-solidrun-microsom.dtsi"
57 	compatible = "solidrun,clearfog-a1", "marvell,armada388",
61 		/* So that mvebu u-boot can update the MAC addresses */
71 		stdout-path = "serial0:115200n8";
74 	reg_3p3v: regulator-3p3v {
75 		compatible = "regulator-fixed";
76 		regulator-name = "3P3V";
77 		regulator-min-microvolt = <3300000>;
78 		regulator-max-microvolt = <3300000>;
79 		regulator-always-on;
83 		internal-regs {
87 				 * twice in u-boot.
103 				bus-width = <4>;
104 				cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
105 				no-1-8-v;
106 				pinctrl-0 = <&microsom_sdhci_pins
108 				pinctrl-names = "default";
111 				wp-inverted;
116 				pinctrl-0 = <&mikro_uart_pins>;
117 				pinctrl-names = "default";
122 				/* CON7, USB-A port on back of device */
131 			 * the mini-PCIe connectors on the board.
135 				reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
140 				reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
146 	gpio-keys {
147 		compatible = "gpio-keys";
148 		pinctrl-0 = <&rear_button_pins>;
149 		pinctrl-names = "default";
155 			linux,can-disable;
166 	managed = "in-band-status";
167 	phy-mode = "sgmii";
172 	phy-mode = "sgmii";
177 	clock-frequency = <400000>;
178 	pinctrl-0 = <&i2c0_pins>;
179 	pinctrl-names = "default";
184 	 *  0-CON3 CLKREQ#
185 	 *  1-CON3 PERST#
186 	 *  2-CON2 PERST#
187 	 *  3-CON3 W_DISABLE
188 	 *  4-CON2 CLKREQ#
189 	 *  5-USB3 overcurrent
190 	 *  6-USB3 power
191 	 *  7-CON2 W_DISABLE
192 	 *  8-JP4 P1
193 	 *  9-JP4 P4
194 	 * 10-JP4 P5
195 	 * 11-m.2 DEVSLP
196 	 * 12-SFP_LOS
197 	 * 13-SFP_TX_FAULT
198 	 * 14-SFP_TX_DISABLE
199 	 * 15-SFP_MOD_DEF0
201 	expander0: gpio-expander@20 {
210 		gpio-controller;
211 		#gpio-cells = <2>;
215 			gpio-hog;
218 			line-name = "pcie1.0-clkreq";
221 			gpio-hog;
223 			output-low;
224 			line-name = "pcie1.0-w-disable";
227 			gpio-hog;
230 			line-name = "pcie2.0-clkreq";
233 			gpio-hog;
235 			output-low;
236 			line-name = "pcie2.0-w-disable";
239 			gpio-hog;
242 			line-name = "usb3-current-limit";
245 			gpio-hog;
247 			output-high;
248 			line-name = "usb3-power";
251 			gpio-hog;
253 			output-low;
254 			line-name = "m.2 devslp";
268 	 *  an AT24C01A/02/04 with address pins tied
273 	 *  0x63-0x64.
275 	clock-frequency = <100000>;
276 	pinctrl-0 = <&clearfog_i2c1_pins>;
277 	pinctrl-names = "default";
282 	clearfog_i2c1_pins: i2c1-pins {
284 		marvell,pins = "mpp26", "mpp27";
287 	clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
288 		marvell,pins = "mpp20";
291 	clearfog_spi1_cs_pins: spi1-cs-pins {
292 		marvell,pins = "mpp55";
295 	mikro_pins: mikro-pins {
297 		marvell,pins = "mpp22", "mpp29";
300 	mikro_spi_pins: mikro-spi-pins {
301 		marvell,pins = "mpp43";
304 	mikro_uart_pins: mikro-uart-pins {
305 		marvell,pins = "mpp24", "mpp25";
308 	rear_button_pins: rear-button-pins {
309 		marvell,pins = "mpp34";
316 	 * Add SPI CS pins for clearfog:
321 	pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
322 	pinctrl-names = "default";
330 MPP20: gpio		? (sd0 detect)
331 MPP21: sd0:cmd		x sd0
339 MPP28: sd0:clk		x sd0
349 MPP37: sd0:d3		x sd0
350 MPP38: sd0:d0		x sd0
351 MPP39: sd0:d1		x sd0
353 MPP40: sd0:d2		x sd0
355 MPP42: gpio		? sw1-1
359 MPP46: ref:clk_out1	x switch clk