Lines Matching +full:- +full:60000
1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/gpio.h>
4 #include "armada-385.dtsi"
11 stdout-path = "serial0:115200n8";
30 pcie-mem-aperture = <0xa0000000 0x40000000>;
33 eco-button-interrupt {
34 compatible = "atl,eco-button-interrupt";
35 eco-button-gpio = <&gpio0 14 GPIO_ACTIVE_LOW>;
38 board-reset {
40 /* Physical board layout of reset pin is active-low but for the
41 * current driver we have to set it to active-high here.
43 phy-reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>,
47 phy-int {
48 compatible = "linux,uio-pdrv-genirq";
49 interrupt-parent = <&gpio0>;
53 led-enable {
54 compatible = "atl,led-enable";
55 led-enable-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
59 compatible = "atl,of-led-7seg";
60 segment-gpios = <
72 compatible = "atl,periph-poe";
73 poe-reset-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
74 interrupt-parent = <&gpio0>;
88 compatible = "marvell,mvebu-devbus";
91 devbus,bus-width = <8>;
92 devbus,turn-off-ps = <60000>;
93 devbus,badr-skew-ps = <0>;
94 devbus,acc-first-ps = <124000>;
95 devbus,acc-next-ps = <248000>;
96 devbus,rd-setup-ps = <0>;
97 devbus,rd-hold-ps = <0>;
100 devbus,sync-enable = <0>;
101 devbus,wr-high-ps = <60000>;
102 devbus,wr-low-ps = <60000>;
103 devbus,ale-wr-ps = <60000>;
108 compatible = "mtd-ram";
110 bank-width = <1>;
116 poe-disable {
117 gpio-hog;
119 output-high;
120 line-name = "poe-disable";
125 poe-mezz-reset {
126 gpio-hog;
128 output-high;
129 line-name = "poe-mezz-reset";
134 clock-frequency = <100000>;
138 #address-cells = <1>;
139 #size-cells = <0>;
142 i2c-mux-idle-disconnect;
145 #address-cells = <1>;
146 #size-cells = <0>;
151 #address-cells = <1>;
152 #size-cells = <0>;
173 #address-cells = <1>;
174 #size-cells = <0>;
184 #address-cells = <1>;
185 #size-cells = <0>;
190 gpio-controller;
191 #gpio-cells = <2>;
197 gpio-controller;
198 #gpio-cells = <2>;
200 interrupt-parent = <&gpio0>;
205 #address-cells = <1>;
206 #size-cells = <0>;
209 i2c-mux-idle-disconnect;
218 spi-flash@0 {
219 #address-cells = <1>;
220 #size-cells = <1>;
221 compatible = "jedec,spi-nor";
223 spi-max-frequency = <50000000>;
224 m25p,fast-read;
226 partition@u-boot {
228 label = "u-boot";
230 partition@u-boot-env {
232 label = "u-boot-env";
246 pinctrl-names = "default";
247 pinctrl-0 = <&uart0_pins>;
256 clock-frequency = <25000000>;
261 num-cs = <1>;
262 nand-ecc-strength = <4>;
263 nand-ecc-step-size = <512>;
264 marvell,nand-enable-arbiter;
265 nand-on-flash-bbt;