arm/dts/am437x-gp-evm.dts

2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
11 /dts-v1/;
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h>
20 	compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
28 		stdout-path = &uart0;
29 		tick-timer = &timer2;
32 	vmmcsd_fixed: fixedregulator-sd {
33 		compatible = "regulator-fixed";
34 		regulator-name = "vmmcsd_fixed";
35 		regulator-min-microvolt = <3300000>;
36 		regulator-max-microvolt = <3300000>;
37 		enable-active-high;
40 	vtt_fixed: fixedregulator-vtt {
41 		compatible = "regulator-fixed";
42 		regulator-name = "vtt_fixed";
43 		regulator-min-microvolt = <1500000>;
44 		regulator-max-microvolt = <1500000>;
45 		regulator-always-on;
46 		regulator-boot-on;
47 		enable-active-high;
51 	vmmcwl_fixed: fixedregulator-mmcwl {
52 		compatible = "regulator-fixed";
53 		regulator-name = "vmmcwl_fixed";
54 		regulator-min-microvolt = <1800000>;
55 		regulator-max-microvolt = <1800000>;
57 		enable-active-high;
61 		compatible = "pwm-backlight";
63 		brightness-levels = <0 51 53 56 62 75 101 152 255>;
64 		default-brightness-level = <8>;
68 		compatible = "gpio-matrix-keypad";
69 		debounce-delay-ms = <5>;
70 		col-scan-delay-us = <2>;
72 		row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
76 		col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
88 		compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
91 		pinctrl-names = "default";
92 		pinctrl-0 = <&lcd_pins>;
100 		enable-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
102 		panel-timing {
103 			clock-frequency = <33000000>;
106 			hfront-porch = <210>;
107 			hback-porch = <16>;
108 			hsync-len = <30>;
109 			vback-porch = <10>;
110 			vfront-porch = <22>;
111 			vsync-len = <13>;
112 			hsync-active = <0>;
113 			vsync-active = <0>;
114 			de-active = <1>;
115 			pixelclk-active = <1>;
120 				remote-endpoint = <&dpi_out>;
127 		#clock-cells = <0>;
128 		compatible = "fixed-clock";
129 		clock-frequency = <12000000>;
135 	pinctrl-names = "default", "sleep";
136 	pinctrl-0 = <&wlan_pins_default>;
137 	pinctrl-1 = <&wlan_pins_sleep>;
140 		pinctrl-single,pins = <
147 		pinctrl-single,pins = <
154 		pinctrl-single,pins = <
160 		pinctrl-single,pins = <
166 		pinctrl-single,pins = <
172 		pinctrl-single,pins = <
190 		pinctrl-single,pins = <
208 		pinctrl-single,pins = <
216 		pinctrl-single,pins = <
224 		pinctrl-single,pins = <
245 		pinctrl-single,pins = <
246 			0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
253 			0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
279 		pinctrl-single,pins = <
286 		pinctrl-single,pins = <
293 		pinctrl-single,pins = <
300 		pinctrl-single,pins = <
301 			0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
302 			0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
303 			0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
304 			0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
305 			0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
306 			0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
307 			0x20C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
308 			0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
309 			0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
310 			0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
311 			0x21C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
312 			0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
313 			0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
318 		pinctrl-single,pins = <
319 			0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
320 			0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
321 			0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
322 			0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
323 			0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
324 			0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
325 			0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
326 			0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
327 			0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
328 			0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
329 			0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
330 			0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
331 			0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
336 		pinctrl-single,pins = <
337 			0x1CC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
338 			0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
339 			0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
340 			0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
341 			0x1DC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
342 			0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
343 			0x1EC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
344 			0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
345 			0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
346 			0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
347 			0x1FC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
348 			0x200 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
349 			0x204 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
354 		pinctrl-single,pins = <
355 			0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
356 			0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
357 			0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
358 			0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
359 			0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
360 			0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
361 			0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
362 			0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
363 			0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
364 			0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
365 			0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
366 			0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
367 			0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
372 		pinctrl-single,pins = <
383 		pinctrl-single,pins = <
394 		pinctrl-single,pins = <
402 		pinctrl-single,pins = <
410 		pinctrl-single,pins = <
421 	pinctrl-names = "default";
422 	pinctrl-0 = <&i2c0_pins>;
423 	clock-frequency = <100000>;
429 		interrupt-controller;
430 		#interrupt-cells = <2>;
432 		dcdc1: regulator-dcdc1 {
433 			compatible = "ti,tps65218-dcdc1";
434 			regulator-name = "vdd_core";
435 			regulator-min-microvolt = <912000>;
436 			regulator-max-microvolt = <1144000>;
437 			regulator-boot-on;
438 			regulator-always-on;
441 		dcdc2: regulator-dcdc2 {
442 			compatible = "ti,tps65218-dcdc2";
443 			regulator-name = "vdd_mpu";
444 			regulator-min-microvolt = <912000>;
445 			regulator-max-microvolt = <1378000>;
446 			regulator-boot-on;
447 			regulator-always-on;
450 		dcdc3: regulator-dcdc3 {
451 			compatible = "ti,tps65218-dcdc3";
452 			regulator-name = "vdcdc3";
453 			regulator-min-microvolt = <1500000>;
454 			regulator-max-microvolt = <1500000>;
455 			regulator-boot-on;
456 			regulator-always-on;
458 		dcdc5: regulator-dcdc5 {
459 			compatible = "ti,tps65218-dcdc5";
460 			regulator-name = "v1_0bat";
461 			regulator-min-microvolt = <1000000>;
462 			regulator-max-microvolt = <1000000>;
465 		dcdc6: regulator-dcdc6 {
466 			compatible = "ti,tps65218-dcdc6";
467 			regulator-name = "v1_8bat";
468 			regulator-min-microvolt = <1800000>;
469 			regulator-max-microvolt = <1800000>;
472 		ldo1: regulator-ldo1 {
473 			compatible = "ti,tps65218-ldo1";
474 			regulator-min-microvolt = <1800000>;
475 			regulator-max-microvolt = <1800000>;
476 			regulator-boot-on;
477 			regulator-always-on;
486 		clock-names = "xvclk";
490 				remote-endpoint = <&vpfe1_ep>;
491 				link-frequencies = /bits/ 64 <70000000>;
499 	pinctrl-names = "default";
500 	pinctrl-0 = <&i2c1_pins>;
503 		pinctrl-names = "default";
504 		pinctrl-0 = <&pixcir_ts_pins>;
506 		interrupt-parent = <&gpio3>;
509 		attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
511 		touchscreen-size-x = <1024>;
512 		touchscreen-size-y = <600>;
520 		clock-names = "xvclk";
524 				remote-endpoint = <&vpfe0_ep>;
525 				link-frequencies = /bits/ 64 <70000000>;
538 	adc {
539 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
545 	pinctrl-names = "default";
546 	pinctrl-0 = <&ecap0_pins>;
567 	ti,no-reset-on-init;
572 	vmmc-supply = <&vmmcsd_fixed>;
573 	bus-width = <4>;
574 	pinctrl-names = "default";
575 	pinctrl-0 = <&mmc1_pins>;
576 	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
580 	/* disable MMC3 as SDIO is not supported in U-Boot */
583 	   xbar-event-map element */
586 	dma-names = "tx", "rx";
587 	vmmc-supply = <&vmmcwl_fixed>;
588 	bus-width = <4>;
589 	pinctrl-names = "default", "sleep";
590 	pinctrl-0 = <&mmc3_pins_default>;
591 	pinctrl-1 = <&mmc3_pins_sleep>;
592 	cap-power-off-card;
593 	keep-power-in-suspend;
594 	ti,non-removable;
596 	#address-cells = <1>;
597 	#size-cells = <0>;
601 		interrupt-parent = <&gpio1>;
607 	ti,edma-xbar-event-map = /bits/ 16 <1 30
613 	pinctrl-names = "default";
614 	pinctrl-0 = <&uart3_pins>;
637 	pinctrl-names = "default", "sleep";
638 	pinctrl-0 = <&cpsw_default>;
639 	pinctrl-1 = <&cpsw_sleep>;
644 	pinctrl-names = "default", "sleep";
645 	pinctrl-0 = <&davinci_mdio_default>;
646 	pinctrl-1 = <&davinci_mdio_sleep>;
652 	phy-mode = "rgmii";
661 	pinctrl-names = "default";
662 	pinctrl-0 = <&nand_flash_x8>;
666 		ti,nand-ecc-opt = "bch16";
667 		ti,elm-id = <&elm>;
668 		nand-bus-width = <8>;
669 		gpmc,device-width = <1>;
670 		gpmc,sync-clk-ps = <0>;
671 		gpmc,cs-on-ns = <0>;
672 		gpmc,cs-rd-off-ns = <40>;
673 		gpmc,cs-wr-off-ns = <40>;
674 		gpmc,adv-on-ns = <0>;
675 		gpmc,adv-rd-off-ns = <25>;
676 		gpmc,adv-wr-off-ns = <25>;
677 		gpmc,we-on-ns = <0>;
678 		gpmc,we-off-ns = <20>;
679 		gpmc,oe-on-ns = <3>;
680 		gpmc,oe-off-ns = <30>;
681 		gpmc,access-ns = <30>;
682 		gpmc,rd-cycle-ns = <40>;
683 		gpmc,wr-cycle-ns = <40>;
684 		gpmc,wait-pin = <0>;
685 		gpmc,bus-turnaround-ns = <0>;
686 		gpmc,cycle2cycle-delay-ns = <0>;
687 		gpmc,clk-activation-ns = <0>;
688 		gpmc,wait-monitoring-ns = <0>;
689 		gpmc,wr-access-ns = <40>;
690 		gpmc,wr-data-mux-bus-ns = <0>;
692 		/* All SPL-* partitions are sized to minimal length
694 		 * NAND flash this is equal to size of erase-block */
695 		#address-cells = <1>;
696 		#size-cells = <1>;
714 			label = "NAND.u-boot-spl-os";
718 			label = "NAND.u-boot";
722 			label = "NAND.u-boot-env";
726 			label = "NAND.u-boot-env.backup1";
734 			label = "NAND.file-system";
743 	pinctrl-names = "default";
744 	pinctrl-0 = <&dss_pins>;
748 			remote-endpoint = <&lcd_in>;
749 			data-lines = <24>;
755 	pinctrl-names = "default";
756 	pinctrl-0 = <&dcan0_default>;
761 	pinctrl-names = "default";
762 	pinctrl-0 = <&dcan1_default>;
768 	pinctrl-names = "default", "sleep";
769 	pinctrl-0 = <&vpfe0_pins_default>;
770 	pinctrl-1 = <&vpfe0_pins_sleep>;
774 			remote-endpoint = <&ov2659_1>;
775 			ti,am437x-vpfe-interface = <0>;
776 			bus-width = <8>;
777 			hsync-active = <0>;
778 			vsync-active = <0>;
785 	pinctrl-names = "default", "sleep";
786 	pinctrl-0 = <&vpfe1_pins_default>;
787 	pinctrl-1 = <&vpfe1_pins_sleep>;
791 			remote-endpoint = <&ov2659_0>;
792 			ti,am437x-vpfe-interface = <0>;
793 			bus-width = <8>;
794 			hsync-active = <0>;
795 			vsync-active = <0>;