Lines Matching +full:0 +full:x1b00

44 	bic	r0,r0,#0x1f
45 	orr	r0,r0,#0xd3
100 	mov	r0, #0
101 	mcr	p15, 0, r0, c7, c7, 0	/* Invalidate I+D+BTB caches */
102 	mcr	p15, 0, r0, c8, c7, 0	/* Invalidate Unified TLB */
107 	mrc	p15, 0, r0, c1, c0, 0
108 	bic	r0, r0, #0x00003300	@ clear bits 13:12, 9:8 (--VI --RS)
109 	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
110 	orr	r0, r0, #0x00000002	@ set bit 1 (A) Align
111 	mcr	p15, 0, r0, c1, c0, 0
124 	mrc	p15, 0, \reg, c2, c0, 0
130 	ldr	r0, =0x0000ffff
131 	mcr	p15, 0, r0, c3, c0, 0
135 	mcr	p15, 0, r0, c2, c0, 0
138 	mrc	p15, 0, r0, c1, c0, 0
139 	bic	r0, #0x1b00
140 	bic	r0, #0x0087
141 	orr	r0, #0x1800
142 	orr	r0, #0x0005
143 	mcr	p15, 0, r0, c1, c0, 0
147 	mcr	p15, 0, r0, c9, c1, 1
148 	mcr	p15, 0, r0, c9, c2, 1
151 	mcr	p15, 0, r0, c7, c7, 0
154 	mcr	p15, 0, r0, c10, c4, 1
155 	mcr	p15, 0, r0, c10, c8, 1
158 	mcr	p15, 0, r0, c8, c7, 0
163 	mcr	p15, 0, r0, c7, c10, 4
165 	mov	r4, #0x00
166 	mov	r5, #0x00
167 	mov	r2, #0x01
168 	mcr	p15, 0, r0, c9, c2, 0
173 	ldr	r1, =0xfffff000
176 	mcr	p15, 0, r1, c7, c2, 5
178 	mcr	p15, 0, r0, c7, c10, 4
183 	subs	r0, #0x01
186 	mcr	p15, 0, r0, c7, c10, 4
187 	mov	r2, #0x00
188 	mcr	p15, 0, r2, c9, c2, 0
196 	/* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */
197 	.set	__base, 0
198 	.rept	0xfff
199 	.word	(__base << 20) | 0xc12
203 	/* 0xfff00000 : 1:1, cached mapping */
204 	.word	(0xfff << 20) | 0x1c1e