Lines Matching refs:cfg_rcwsrds1
397 u32 cfg_rcwsrds1 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in setup_serdes_volt() local
431 do_enabled_lanes_reset(1, cfg_rcwsrds1, serdes1_base, false); in setup_serdes_volt()
443 cfg_tmp = cfg_rcwsrds1 & 0x3; in setup_serdes_volt()
448 cfg_tmp = cfg_rcwsrds1 & 0xC; in setup_serdes_volt()
480 cfg_tmp = cfg_rcwsrds1 & 0x3; in setup_serdes_volt()
484 cfg_tmp = cfg_rcwsrds1 & 0xC; in setup_serdes_volt()
498 cfg_tmp = cfg_rcwsrds1 & 0x3; in setup_serdes_volt()
503 cfg_tmp = cfg_rcwsrds1 & 0xC; in setup_serdes_volt()
516 do_enabled_lanes_reset(1, cfg_rcwsrds1, serdes1_base, true); in setup_serdes_volt()
528 cfg_tmp = cfg_rcwsrds1 & 0x3; in setup_serdes_volt()
532 cfg_tmp = cfg_rcwsrds1 & 0xC; in setup_serdes_volt()