Lines Matching refs:bi_dram
497 final_map[index].virt = gd->bd->bi_dram[0].start; in final_mmu_setup()
498 final_map[index].phys = gd->bd->bi_dram[0].start; in final_mmu_setup()
499 final_map[index].size = gd->bd->bi_dram[0].size; in final_mmu_setup()
504 final_map[index].virt = gd->bd->bi_dram[1].start; in final_mmu_setup()
505 final_map[index].phys = gd->bd->bi_dram[1].start; in final_mmu_setup()
506 final_map[index].size = gd->bd->bi_dram[1].size; in final_mmu_setup()
515 final_map[index].virt = gd->bd->bi_dram[2].start; in final_mmu_setup()
516 final_map[index].phys = gd->bd->bi_dram[2].start; in final_mmu_setup()
517 final_map[index].size = gd->bd->bi_dram[2].size; in final_mmu_setup()
1333 gd->bd->bi_dram[i].start = regs.regs[1]; in tfa_dram_init_banksize()
1334 gd->bd->bi_dram[i].size = regs.regs[2]; in tfa_dram_init_banksize()
1336 dram_size -= gd->bd->bi_dram[i].size; in tfa_dram_init_banksize()
1347 if (gd->bd->bi_dram[2].size >= in tfa_dram_init_banksize()
1348 board_reserve_ram_top(gd->bd->bi_dram[2].size)) { in tfa_dram_init_banksize()
1349 gd->arch.resv_ram = gd->bd->bi_dram[2].start + in tfa_dram_init_banksize()
1350 gd->bd->bi_dram[2].size - in tfa_dram_init_banksize()
1351 board_reserve_ram_top(gd->bd->bi_dram[2].size); in tfa_dram_init_banksize()
1355 if (gd->bd->bi_dram[1].size >= in tfa_dram_init_banksize()
1356 board_reserve_ram_top(gd->bd->bi_dram[1].size)) { in tfa_dram_init_banksize()
1357 gd->arch.resv_ram = gd->bd->bi_dram[1].start + in tfa_dram_init_banksize()
1358 gd->bd->bi_dram[1].size - in tfa_dram_init_banksize()
1359 board_reserve_ram_top(gd->bd->bi_dram[1].size); in tfa_dram_init_banksize()
1360 } else if (gd->bd->bi_dram[0].size > in tfa_dram_init_banksize()
1361 board_reserve_ram_top(gd->bd->bi_dram[0].size)) { in tfa_dram_init_banksize()
1362 gd->arch.resv_ram = gd->bd->bi_dram[0].start + in tfa_dram_init_banksize()
1363 gd->bd->bi_dram[0].size - in tfa_dram_init_banksize()
1364 board_reserve_ram_top(gd->bd->bi_dram[0].size); in tfa_dram_init_banksize()
1401 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
1403 gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; in dram_init_banksize()
1404 gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; in dram_init_banksize()
1405 gd->bd->bi_dram[1].size = gd->ram_size - in dram_init_banksize()
1408 if (gd->bi_dram[1].size > CONFIG_SYS_DDR_BLOCK2_SIZE) { in dram_init_banksize()
1409 gd->bd->bi_dram[2].start = CONFIG_SYS_DDR_BLOCK3_BASE; in dram_init_banksize()
1410 gd->bd->bi_dram[2].size = gd->bd->bi_dram[1].size - in dram_init_banksize()
1412 gd->bd->bi_dram[1].size = CONFIG_SYS_DDR_BLOCK2_SIZE; in dram_init_banksize()
1416 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init_banksize()
1419 if (gd->bd->bi_dram[0].size > in dram_init_banksize()
1421 gd->bd->bi_dram[0].size -= in dram_init_banksize()
1423 gd->arch.secure_ram = gd->bd->bi_dram[0].start + in dram_init_banksize()
1424 gd->bd->bi_dram[0].size; in dram_init_banksize()
1433 if (gd->bd->bi_dram[2].size >= in dram_init_banksize()
1434 board_reserve_ram_top(gd->bd->bi_dram[2].size)) { in dram_init_banksize()
1435 gd->arch.resv_ram = gd->bd->bi_dram[2].start + in dram_init_banksize()
1436 gd->bd->bi_dram[2].size - in dram_init_banksize()
1437 board_reserve_ram_top(gd->bd->bi_dram[2].size); in dram_init_banksize()
1441 if (gd->bd->bi_dram[1].size >= in dram_init_banksize()
1442 board_reserve_ram_top(gd->bd->bi_dram[1].size)) { in dram_init_banksize()
1443 gd->arch.resv_ram = gd->bd->bi_dram[1].start + in dram_init_banksize()
1444 gd->bd->bi_dram[1].size - in dram_init_banksize()
1445 board_reserve_ram_top(gd->bd->bi_dram[1].size); in dram_init_banksize()
1446 } else if (gd->bd->bi_dram[0].size > in dram_init_banksize()
1447 board_reserve_ram_top(gd->bd->bi_dram[0].size)) { in dram_init_banksize()
1448 gd->arch.resv_ram = gd->bd->bi_dram[0].start + in dram_init_banksize()
1449 gd->bd->bi_dram[0].size - in dram_init_banksize()
1450 board_reserve_ram_top(gd->bd->bi_dram[0].size); in dram_init_banksize()
1472 gd->bd->bi_dram[2].start = CONFIG_SYS_DP_DDR_BASE; in dram_init_banksize()
1473 gd->bd->bi_dram[2].size = dp_ddr_size; in dram_init_banksize()
1505 ram_start = gd->bd->bi_dram[i].start; in efi_add_known_memory()
1506 ram_size = gd->bd->bi_dram[i].size; in efi_add_known_memory()