Lines Matching full:select

3 	select ARMV8_SET_SMPEN
4 select ARM_ERRATA_855873 if !TFABOOT
5 select FSL_LAYERSCAPE
6 select FSL_LSCH2
7 select SYS_FSL_SRDS_1
8 select SYS_HAS_SERDES
9 select SYS_FSL_DDR_BE
10 select SYS_FSL_MMDC
11 select SYS_FSL_ERRATUM_A010315
12 select SYS_FSL_ERRATUM_A009798
13 select SYS_FSL_ERRATUM_A008997
14 select SYS_FSL_ERRATUM_A009007
15 select SYS_FSL_ERRATUM_A009008
16 select ARCH_EARLY_INIT_R
17 select BOARD_EARLY_INIT_F
18 select SYS_I2C_MXC
19 select SYS_I2C_MXC_I2C1
20 select SYS_I2C_MXC_I2C2
25 select ARMV8_SET_SMPEN
26 select ARM_ERRATA_855873 if !TFABOOT
27 select FSL_LAYERSCAPE
28 select FSL_LSCH2
29 select SYS_FSL_SRDS_1
30 select SYS_HAS_SERDES
31 select SYS_FSL_DDR
32 select SYS_FSL_DDR_BE
33 select SYS_FSL_DDR_VER_50
34 select SYS_FSL_ERRATUM_A008850 if !TFABOOT
35 select SYS_FSL_ERRATUM_A008997
36 select SYS_FSL_ERRATUM_A009007
37 select SYS_FSL_ERRATUM_A009008
38 select SYS_FSL_ERRATUM_A009660 if !TFABOOT
39 select SYS_FSL_ERRATUM_A009663 if !TFABOOT
40 select SYS_FSL_ERRATUM_A009798
41 select SYS_FSL_ERRATUM_A009929
42 select SYS_FSL_ERRATUM_A009942 if !TFABOOT
43 select SYS_FSL_ERRATUM_A010315
44 select SYS_FSL_ERRATUM_A010539
45 select SYS_FSL_HAS_DDR3
46 select SYS_FSL_HAS_DDR4
47 select ARCH_EARLY_INIT_R
48 select BOARD_EARLY_INIT_F
49 select SYS_I2C_MXC
50 select SYS_I2C_MXC_I2C1
51 select SYS_I2C_MXC_I2C2
52 select SYS_I2C_MXC_I2C3
53 select SYS_I2C_MXC_I2C4
58 select ARMV8_SET_SMPEN
59 select FSL_LAYERSCAPE
60 select FSL_LSCH2
61 select SYS_FSL_SRDS_1
62 select SYS_HAS_SERDES
63 select SYS_FSL_DDR
64 select SYS_FSL_DDR_BE
65 select SYS_FSL_DDR_VER_50
66 select SYS_FSL_ERRATUM_A008336 if !TFABOOT
67 select SYS_FSL_ERRATUM_A008511 if !TFABOOT
68 select SYS_FSL_ERRATUM_A008850 if !TFABOOT
69 select SYS_FSL_ERRATUM_A008997
70 select SYS_FSL_ERRATUM_A009007
71 select SYS_FSL_ERRATUM_A009008
72 select SYS_FSL_ERRATUM_A009798
73 select SYS_FSL_ERRATUM_A009801
74 select SYS_FSL_ERRATUM_A009803 if !TFABOOT
75 select SYS_FSL_ERRATUM_A009942 if !TFABOOT
76 select SYS_FSL_ERRATUM_A010165 if !TFABOOT
77 select SYS_FSL_ERRATUM_A010539
78 select SYS_FSL_HAS_DDR4
79 select SYS_FSL_SRDS_2
80 select ARCH_EARLY_INIT_R
81 select BOARD_EARLY_INIT_F
82 select SYS_I2C_MXC
83 select SYS_I2C_MXC_I2C1
84 select SYS_I2C_MXC_I2C2
85 select SYS_I2C_MXC_I2C3
86 select SYS_I2C_MXC_I2C4
92 select ARMV8_SET_SMPEN
93 select ARM_ERRATA_855873 if !TFABOOT
94 select FSL_LAYERSCAPE
95 select FSL_LSCH3
96 select SYS_FSL_SRDS_1
97 select SYS_HAS_SERDES
98 select SYS_FSL_DDR
99 select SYS_FSL_DDR_LE
100 select SYS_FSL_DDR_VER_50
101 select SYS_FSL_EC1
102 select SYS_FSL_EC2
103 select SYS_FSL_ERRATUM_A009803 if !TFABOOT
104 select SYS_FSL_ERRATUM_A009942 if !TFABOOT
105 select SYS_FSL_ERRATUM_A010165 if !TFABOOT
106 select SYS_FSL_ERRATUM_A008511 if !TFABOOT
107 select SYS_FSL_ERRATUM_A008850 if !TFABOOT
108 select SYS_FSL_ERRATUM_A009007
109 select SYS_FSL_HAS_CCI400
110 select SYS_FSL_HAS_DDR4
111 select SYS_FSL_HAS_RGMII
112 select SYS_FSL_HAS_SEC
113 select SYS_FSL_SEC_COMPAT_5
114 select SYS_FSL_SEC_LE
115 select SYS_FSL_SRDS_1
116 select SYS_FSL_SRDS_2
117 select FSL_TZASC_1
118 select FSL_TZASC_400
119 select FSL_TZPC_BP147
120 select ARCH_EARLY_INIT_R
121 select BOARD_EARLY_INIT_F
122 select SYS_I2C_MXC
123 select SYS_I2C_MXC_I2C1
124 select SYS_I2C_MXC_I2C2
125 select SYS_I2C_MXC_I2C3
126 select SYS_I2C_MXC_I2C4
132 select ARMV8_SET_SMPEN
133 select ARM_ERRATA_826974
134 select ARM_ERRATA_828024
135 select ARM_ERRATA_829520
136 select ARM_ERRATA_833471
137 select FSL_LAYERSCAPE
138 select FSL_LSCH3
139 select SYS_FSL_SRDS_1
140 select SYS_HAS_SERDES
141 select SYS_FSL_DDR
142 select SYS_FSL_DDR_LE
143 select SYS_FSL_DDR_VER_50
144 select SYS_FSL_HAS_CCN504
145 select SYS_FSL_HAS_DP_DDR
146 select SYS_FSL_HAS_SEC
147 select SYS_FSL_HAS_DDR4
148 select SYS_FSL_SEC_COMPAT_5
149 select SYS_FSL_SEC_LE
150 select SYS_FSL_SRDS_2
151 select FSL_TZASC_1
152 select FSL_TZASC_2
153 select FSL_TZASC_400
154 select FSL_TZPC_BP147
155 select SYS_FSL_ERRATUM_A008336 if !TFABOOT
156 select SYS_FSL_ERRATUM_A008511 if !TFABOOT
157 select SYS_FSL_ERRATUM_A008514 if !TFABOOT
158 select SYS_FSL_ERRATUM_A008585
159 select SYS_FSL_ERRATUM_A008997
160 select SYS_FSL_ERRATUM_A009007
161 select SYS_FSL_ERRATUM_A009008
162 select SYS_FSL_ERRATUM_A009635
163 select SYS_FSL_ERRATUM_A009663 if !TFABOOT
164 select SYS_FSL_ERRATUM_A009798
165 select SYS_FSL_ERRATUM_A009801
166 select SYS_FSL_ERRATUM_A009803 if !TFABOOT
167 select SYS_FSL_ERRATUM_A009942 if !TFABOOT
168 select SYS_FSL_ERRATUM_A010165 if !TFABOOT
169 select SYS_FSL_ERRATUM_A009203
170 select ARCH_EARLY_INIT_R
171 select BOARD_EARLY_INIT_F
172 select SYS_I2C_MXC
173 select SYS_I2C_MXC_I2C1
174 select SYS_I2C_MXC_I2C2
175 select SYS_I2C_MXC_I2C3
176 select SYS_I2C_MXC_I2C4
182 select ARMV8_SET_SMPEN
183 select FSL_LSCH3
184 select NXP_LSCH3_2
185 select SYS_HAS_SERDES
186 select SYS_FSL_SRDS_1
187 select SYS_FSL_SRDS_2
188 select SYS_NXP_SRDS_3
189 select SYS_FSL_DDR
190 select SYS_FSL_DDR_LE
191 select SYS_FSL_DDR_VER_50
192 select SYS_FSL_EC1
193 select SYS_FSL_EC2
194 select SYS_FSL_HAS_RGMII
195 select SYS_FSL_HAS_SEC
196 select SYS_FSL_HAS_CCN508
197 select SYS_FSL_HAS_DDR4
198 select SYS_FSL_SEC_COMPAT_5
199 select SYS_FSL_SEC_LE
200 select ARCH_EARLY_INIT_R
201 select BOARD_EARLY_INIT_F
202 select SYS_I2C_MXC
203 select SYS_I2C_MXC_I2C1
204 select SYS_I2C_MXC_I2C2
205 select SYS_I2C_MXC_I2C3
206 select SYS_I2C_MXC_I2C4
207 select SYS_I2C_MXC_I2C5
208 select SYS_I2C_MXC_I2C6
209 select SYS_I2C_MXC_I2C7
210 select SYS_I2C_MXC_I2C8
218 select SYS_FSL_HAS_CCI400
219 select SYS_FSL_HAS_SEC
220 select SYS_FSL_SEC_COMPAT_5
221 select SYS_FSL_SEC_BE
233 select RESV_RAM
268 select ARMV8_SEC_FIRMWARE_SUPPORT
269 select SEC_FIRMWARE_ARMV8_PSCI
270 select ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT if FSL_LSCH2
280 select SPL_ARMV8_SEC_FIRMWARE_SUPPORT
281 select SEC_FIRMWARE_ARMV8_PSCI
282 select ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT if FSL_LSCH2
290 prompt "FSL Layerscape PPA firmware loading-media select"
587 pins, select it when the pins are assigned to USB.