Lines Matching +full:firmware +full:- +full:reset

15         bool "Enable multiple CPUs to enter into U-Boot"
20 	  Say Y here if there is not any trust firmware to set
21 	  CPUECTLR_EL1.SMPEN bit before U-Boot.
28 	  register may be controlled by EL3/EL2 firmware. To be more
29 	  precise, by default (if there is EL2/EL3 firmware running)
36 	bool "Support spin-table enable method"
39 	  Say Y here to support "spin-table" enable method for booting Linux.
42 	    - Specify enable-method = "spin-table" in each CPU node in the
44 	    - Bring secondary CPUs into U-Boot proper in a board specific
49 	  U-Boot automatically does:
50 	    - Set "cpu-release-addr" property of each CPU node
52 	    - Reserve the code for the spin-table and the release address
55 menu "ARMv8 secure monitor firmware"
57 	bool "Enable ARMv8 secure monitor firmware framework support"
61 	  This framework is aimed at making secure monitor firmware load
65 	    - Address of secure firmware.
66 	    - Address to hold the return address from secure firmware.
67 	    - Secure firmware FIT image related information.
69 	    - The target exception level that secure monitor firmware will
73 	bool "Enable ARMv8 secure monitor firmware framework support for SPL"
80 	bool "PSCI implementation in secure monitor firmware"
84 	  firmware. This is a private PSCI implementation and different from
88 	bool "ARMv8 secure monitor firmware ERET address byteorder swap"
92 	  Secure firmware exception return address is different with core's.
97 	bool "Use PSCI for reset and shutdown"
114 	  ARM Trusted Firmware or other firmware.
116 	  On these systems, we do not need to implement system reset manually,
117 	  but can instead rely on higher level firmware to deal with it.
119 	  Select Y here to make use of PSCI calls for system reset
126 	  The PSCI in U-boot provides a general framework and each platform
135 	  The maximum number of CPUs supported in the PSCI firmware.
147 	  System with multi-cluster should difine their own exact value.
163 	  If not defined, the PSCI sections are placed together with the u-boot
165 	  places such as some secure RAM built-in SOC etc.