cpu/armv7/cache_v7_asm.S

19  *	Flush the whole D-cache.
23  *	Note: copied from arch/arm/mm/cache-v7.S of Linux 4.4
32 	mov	r10, #0				@ start clean at cache level 0
34 	add	r2, r10, r10, lsr #1		@ work out 3x current cache level
35 	mov	r1, r0, lsr r2			@ extract cache type bits from clidr
36 	and	r1, r1, #7			@ mask of the bits for current cache only
37 	cmp	r1, #2				@ see what cache we have at this level
38 	blt	skip				@ skip if no cache, or just i-cache
39 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
42 	and	r2, r1, #7			@ extract the length of the cache lines
52  ARM(	orr	r11, r10, r4, lsl r5	)	@ factor way and cache number into r11
54  THUMB(	orr	r11, r10, r6		)	@ factor way and cache number into r11
64 	add	r10, r10, #2			@ increment cache number
68 	mov	r10, #0				@ swith back to cache level 0
69 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
87  *	Invalidate the whole D-cache.
102 	mov	r10, #0				@ start clean at cache level 0
104 	add	r2, r10, r10, lsr #1		@ work out 3x current cache level
105 	mov	r1, r0, lsr r2			@ extract cache type bits from clidr
106 	and	r1, r1, #7			@ mask of the bits for current cache only
107 	cmp	r1, #2				@ see what cache we have at this level
108 	blt	inval_skip			@ skip if no cache, or just i-cache
109 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
112 	and	r2, r1, #7			@ extract the length of the cache lines
122  ARM(	orr	r11, r10, r4, lsl r5	)	@ factor way and cache number into r11
124  THUMB(	orr	r11, r10, r6		)	@ factor way and cache number into r11
134 	add	r10, r10, #2			@ increment cache number
138 	mov	r10, #0				@ swith back to cache level 0
139 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr