Lines Matching refs:AR_SIZE
535 #define AR_SIZE 4 macro
538 TestStructTriv *ar[AR_SIZE];
547 AR_SIZE, 0, vmsd_tst, TestStructTriv),
562 TestStructTriv ar[AR_SIZE] = {{.i = 0}, {.i = 1}, {.i = 2}, {.i = 3} }; in test_arr_ptr_str_no0_save()
571 TestStructTriv ar_gt[AR_SIZE] = {{.i = 0}, {.i = 1}, {.i = 2}, {.i = 3} }; in test_arr_ptr_str_no0_load()
572 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_no0_load()
579 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_no0_load()
595 TestStructTriv ar[AR_SIZE] = {{.i = 0}, {.i = 1}, {.i = 2}, {.i = 3} }; in test_arr_ptr_str_0_save()
604 TestStructTriv ar_gt[AR_SIZE] = {{.i = 0}, {.i = 0}, {.i = 2}, {.i = 3} }; in test_arr_ptr_str_0_load()
605 TestStructTriv ar[AR_SIZE] = {}; in test_arr_ptr_str_0_load()
612 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
616 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_str_0_load()
626 int32_t *ar[AR_SIZE];
635 AR_SIZE, 0, vmstate_info_int32, int32_t*),
642 int32_t ar[AR_SIZE] = {0 , 1, 2, 3}; in test_arr_ptr_prim_0_save()
651 int32_t ar_gt[AR_SIZE] = {0, 1, 2, 3}; in test_arr_ptr_prim_0_load()
652 int32_t ar[AR_SIZE] = {3 , 42, 1, 0}; in test_arr_ptr_prim_0_load()
659 for (idx = 0; idx < AR_SIZE; ++idx) { in test_arr_ptr_prim_0_load()