tcg/xtensa/test_dfp0_arith.S

52     test_op2 add.d, f9, f10, f11, F64_1, F64_QNAN(1), \
53         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
57         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
62         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
65     test_op2 add.d, f5, f6, f7, F64_QNAN(1), F64_SNAN(2), \
66         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
69     test_op2 add.d, f8, f9, f10, F64_SNAN(1), F64_QNAN(2), \
70         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
114     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_1, F64_1, \
115         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
117     test_op3 madd.d, f0, f1, f2, f0, F64_1, F64_QNAN(2), F64_1, \
118         F64_QNAN(2), F64_QNAN(2), F64_QNAN(2), F64_QNAN(2), \
120     test_op3 madd.d, f0, f1, f2, f0, F64_1, F64_1, F64_QNAN(3), \
121         F64_QNAN(3), F64_QNAN(3), F64_QNAN(3), F64_QNAN(3), \
124     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_QNAN(2), F64_1, \
125         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
127     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_1, F64_QNAN(3), \
128         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
130     test_op3 madd.d, f0, f1, f2, f0, F64_1, F64_QNAN(2), F64_QNAN(3), \
131         F64_QNAN(3), F64_QNAN(3), F64_QNAN(3), F64_QNAN(3), \
134     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_QNAN(2), F64_QNAN(3), \
135         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
144         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
147     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_PINF, F64_0, \
148         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
153         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \
155     test_op3 madd.d, f0, f1, f2, f0, F64_QNAN(1), F64_SNAN(2), F64_1, \
156         F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), F64_QNAN(1), \