Lines Matching refs:DREG_CALC_RESULT
17 #define DREG_CALC_RESULT %d5 macro
75 insn DREG_CALC_RESULT, ld_pattern; \
78 jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
79 mov.d DREG_CALC_RESULT, AREG_ADDR; \
81 jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
90 mov.d DREG_CALC_RESULT, AREG_ADDR; \
92 jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
103 TEST_CASE(num, DREG_CALC_RESULT, result, \
105 insn DREG_CALC_RESULT, DREG_RS1; \
109 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
116 TEST_CASE(num, DREG_CALC_RESULT, result, \
121 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
125 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
129 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
133 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
138 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
142 TEST_CASE(num, DREG_CALC_RESULT, result, \
146 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
150 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
154 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
158 TEST_CASE(num, DREG_CALC_RESULT, result, \
162 insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
166 TEST_CASE(num, DREG_CALC_RESULT, result, \
170 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm1, imm2; \
174 TEST_CASE(num, DREG_CALC_RESULT, result, \
179 insn DREG_CALC_RESULT, DREG_RS1, imm1, EREG_RS2; \
183 TEST_CASE(num, DREG_CALC_RESULT, result, \
186 insn DREG_CALC_RESULT, DREG_RS1, imm1, imm2, imm3; \