19 #define TMP105_TEST_ADDR 0x49
51     g_assert_cmpuint(value, ==, 0);  in send_and_receive()
54     g_assert_cmphex(value, ==, 0);  in send_and_receive()
61     g_assert_cmphex(value, ==, 0x1400);  in send_and_receive()
69     i2c_set8(i2cdev, TMP105_REG_CONFIG, 0x60);  in send_and_receive()
71     g_assert_cmphex(value, ==, 0x60);  in send_and_receive()
74     g_assert_cmphex(value, ==, 0x14f0);  in send_and_receive()
77     i2c_set8(i2cdev, TMP105_REG_CONFIG, 0x00);  in send_and_receive()
78     g_assert_cmphex(i2c_get8(i2cdev, TMP105_REG_CONFIG), ==, 0x00);  in send_and_receive()
80     g_assert_cmphex(value, ==, 0x1480);  in send_and_receive()
82     i2c_set8(i2cdev, TMP105_REG_CONFIG, 0x20);  in send_and_receive()
83     g_assert_cmphex(i2c_get8(i2cdev, TMP105_REG_CONFIG), ==, 0x20);  in send_and_receive()
85     g_assert_cmphex(value, ==, 0x14c0);  in send_and_receive()
87     i2c_set8(i2cdev, TMP105_REG_CONFIG, 0x40);  in send_and_receive()
88     g_assert_cmphex(i2c_get8(i2cdev, TMP105_REG_CONFIG), ==, 0x40);  in send_and_receive()
90     g_assert_cmphex(value, ==, 0x14e0);  in send_and_receive()
97     i2c_set8(i2cdev, TMP105_REG_CONFIG, 0x60);  in send_and_receive()
98     g_assert_cmphex(i2c_get8(i2cdev, TMP105_REG_CONFIG), ==, 0x60);  in send_and_receive()
100     g_assert_cmphex(value, ==, 0x14f0);  in send_and_receive()
102     i2c_set16(i2cdev, TMP105_REG_T_LOW, 0x1234);  in send_and_receive()
103     g_assert_cmphex(i2c_get16(i2cdev, TMP105_REG_T_LOW), ==, 0x1230);  in send_and_receive()
104     i2c_set16(i2cdev, TMP105_REG_T_HIGH, 0x4231);  in send_and_receive()
105     g_assert_cmphex(i2c_get16(i2cdev, TMP105_REG_T_HIGH), ==, 0x4230);  in send_and_receive()
111         .extra_device_opts = "id=" TMP105_TEST_ID ",address=0x49"  in tmp105_register_nodes()
113     add_qi2c_address(&opts, &(QI2CAddress) { 0x49 });  in tmp105_register_nodes()