tests/qtest/stm32l4x5_gpio-test.c

159 static uint32_t reset(uint32_t gpio, unsigned int offset)  in reset()  function
176      * after reset are correct, and that the value in IDR is  in test_idr_reset_value()
178      * Since AF and analog modes aren't implemented, IDR reset  in test_idr_reset_value()
218     g_assert_cmphex(moder, ==, reset(GPIO_A, MODER));  in test_idr_reset_value()
219     g_assert_cmphex(odr, ==, reset(GPIO_A, ODR));  in test_idr_reset_value()
220     g_assert_cmphex(otyper, ==, reset(GPIO_A, OTYPER));  in test_idr_reset_value()
222     g_assert_cmphex(pupdr, ==, reset(GPIO_A, PUPDR));  in test_idr_reset_value()
223     /* 15 : 1, 14: 0, 13: 1, 12 : reset value ... */  in test_idr_reset_value()
224     g_assert_cmphex(idr, ==, reset(GPIO_A, IDR));  in test_idr_reset_value()
233     g_assert_cmphex(moder, ==, reset(GPIO_B, MODER));  in test_idr_reset_value()
234     g_assert_cmphex(odr, ==, reset(GPIO_B, ODR));  in test_idr_reset_value()
235     g_assert_cmphex(otyper, ==, reset(GPIO_B, OTYPER));  in test_idr_reset_value()
237     g_assert_cmphex(pupdr, ==, reset(GPIO_B, PUPDR));  in test_idr_reset_value()
238     /* ... 5 : reset value, 4 : 1, 3 : reset value ... */  in test_idr_reset_value()
239     g_assert_cmphex(idr, ==, reset(GPIO_B, IDR));  in test_idr_reset_value()
247     g_assert_cmphex(moder, ==, reset(GPIO_C, MODER));  in test_idr_reset_value()
248     g_assert_cmphex(odr, ==, reset(GPIO_C, ODR));  in test_idr_reset_value()
249     g_assert_cmphex(otyper, ==, reset(GPIO_C, OTYPER));  in test_idr_reset_value()
251     g_assert_cmphex(pupdr, ==, reset(GPIO_C, PUPDR));  in test_idr_reset_value()
252     /* reset value */  in test_idr_reset_value()
253     g_assert_cmphex(idr, ==, reset(GPIO_C, IDR));  in test_idr_reset_value()
261     g_assert_cmphex(moder, ==, reset(GPIO_H, MODER));  in test_idr_reset_value()
262     g_assert_cmphex(odr, ==, reset(GPIO_H, ODR));  in test_idr_reset_value()
263     g_assert_cmphex(otyper, ==, reset(GPIO_H, OTYPER));  in test_idr_reset_value()
265     g_assert_cmphex(pupdr, ==, reset(GPIO_H, PUPDR));  in test_idr_reset_value()
266     /* reset value */  in test_idr_reset_value()
267     g_assert_cmphex(idr, ==, reset(GPIO_H, IDR));  in test_idr_reset_value()
287     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_output_mode()
292     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_gpio_output_mode()
295     /* Reset the bit in ODR and check the pin is low */  in test_gpio_output_mode()
297     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_gpio_output_mode()
301     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_gpio_output_mode()
302     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_gpio_output_mode()
303     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_output_mode()
323     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_gpio_input_mode()
328     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_gpio_input_mode()
332     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_gpio_input_mode()
334     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_gpio_input_mode()
352     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) | (1 << pin));  in test_pull_up_pull_down()
357     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_pull_up_pull_down()
361     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_pull_up_pull_down()
362     gpio_writel(gpio, PUPDR, reset(gpio, PUPDR));  in test_pull_up_pull_down()
363     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_pull_up_pull_down()
370      * disconnects the pin, that the pin can't be set or reset  in test_push_pull()
384     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_push_pull()
392     g_assert_cmphex(gpio_readl(gpio2, IDR), ==, reset(gpio2, IDR) | (1 << pin));  in test_push_pull()
397     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_push_pull()
399     /* Trying to reset a push-pull output pin, checking it doesn't work */  in test_push_pull()
402     g_assert_cmphex(gpio_readl(gpio2, IDR), ==, reset(gpio2, IDR) | (1 << pin));  in test_push_pull()
405     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_push_pull()
406     gpio_writel(gpio2, ODR, reset(gpio2, ODR));  in test_push_pull()
407     gpio_writel(gpio2, MODER, reset(gpio2, MODER));  in test_push_pull()
432     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_open_drain()
442                                reset(gpio2, IDR) & ~(1 << pin));  in test_open_drain()
447     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR) & ~(1 << pin));  in test_open_drain()
449     /* Trying to reset a open-drain output pin, checking it works */  in test_open_drain()
454                                reset(gpio2, IDR) & ~(1 << pin));  in test_open_drain()
458     gpio_writel(gpio2, OTYPER, reset(gpio2, OTYPER));  in test_open_drain()
459     gpio_writel(gpio2, ODR, reset(gpio2, ODR));  in test_open_drain()
460     gpio_writel(gpio2, MODER, reset(gpio2, MODER));  in test_open_drain()
461     g_assert_cmphex(gpio_readl(gpio2, IDR), ==, reset(gpio2, IDR));  in test_open_drain()
463     gpio_writel(gpio, OTYPER, reset(gpio, OTYPER));  in test_open_drain()
464     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_open_drain()
465     gpio_writel(gpio, MODER, reset(gpio, MODER));  in test_open_drain()
466     g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR));  in test_open_drain()
480     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
483     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
486     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
489     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
493     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR) | (1 << pin));  in test_bsrr_brr()
496     g_assert_cmphex(gpio_readl(gpio, ODR), ==, reset(gpio, ODR));  in test_bsrr_brr()
498     gpio_writel(gpio, ODR, reset(gpio, ODR));  in test_bsrr_brr()
531      * but the tests don't work for pins that are high at reset  in main()