65     e1000e_macreg_write(&d->e1000e, E1000_CTRL, val | E1000_CTRL_RST | E1000_CTRL_SLU);  in igb_pci_start_hw()
68     e1000e_macreg_write(&d->e1000e, E1000_MDIC,  in igb_pci_start_hw()
78     e1000e_macreg_write(&d->e1000e, E1000_IVAR0, IGB_IVAR_TEST_CFG);  in igb_pci_start_hw()
85     e1000e_macreg_write(&d->e1000e, E1000_RCTL, 0);  in igb_pci_start_hw()
86     e1000e_macreg_write(&d->e1000e, E1000_TCTL, 0);  in igb_pci_start_hw()
88     e1000e_macreg_write(&d->e1000e, E1000_TDBAL(0),  in igb_pci_start_hw()
90     e1000e_macreg_write(&d->e1000e, E1000_TDBAH(0),  in igb_pci_start_hw()
92     e1000e_macreg_write(&d->e1000e, E1000_TDLEN(0), E1000E_RING_LEN);  in igb_pci_start_hw()
93     e1000e_macreg_write(&d->e1000e, E1000_TDT(0), 0);  in igb_pci_start_hw()
94     e1000e_macreg_write(&d->e1000e, E1000_TDH(0), 0);  in igb_pci_start_hw()
97     e1000e_macreg_write(&d->e1000e, E1000_TCTL, E1000_TCTL_EN);  in igb_pci_start_hw()
99     e1000e_macreg_write(&d->e1000e, E1000_RDBAL(0),  in igb_pci_start_hw()
101     e1000e_macreg_write(&d->e1000e, E1000_RDBAH(0),  in igb_pci_start_hw()
103     e1000e_macreg_write(&d->e1000e, E1000_RDLEN(0), E1000E_RING_LEN);  in igb_pci_start_hw()
104     e1000e_macreg_write(&d->e1000e, E1000_RDT(0), 0);  in igb_pci_start_hw()
105     e1000e_macreg_write(&d->e1000e, E1000_RDH(0), 0);  in igb_pci_start_hw()
106     e1000e_macreg_write(&d->e1000e, E1000_RA,  in igb_pci_start_hw()
108     e1000e_macreg_write(&d->e1000e, E1000_RA + 4,  in igb_pci_start_hw()
113     e1000e_macreg_write(&d->e1000e,  in igb_pci_start_hw()
118     e1000e_macreg_write(&d->e1000e, E1000_RFCTL, E1000_RFCTL_EXTEN);  in igb_pci_start_hw()
119     e1000e_macreg_write(&d->e1000e, E1000_RCTL, E1000_RCTL_EN);  in igb_pci_start_hw()
122     e1000e_macreg_write(&d->e1000e, E1000_GPIE,  E1000_GPIE_MSIX_MODE);  in igb_pci_start_hw()
123     e1000e_macreg_write(&d->e1000e, E1000_IMS,  0xFFFFFFFF);  in igb_pci_start_hw()
124     e1000e_macreg_write(&d->e1000e, E1000_EIMS, 0xFFFFFFFF);  in igb_pci_start_hw()