Lines Matching +full:0 +full:x54
21 0x88, 0xe0, /* ldi r24, 0x08 */
22 0x80, 0x93, 0xc1, 0x00, /* sts 0x00C1, r24 ; Enable tx */
23 0x86, 0xe0, /* ldi r24, 0x06 */
24 0x80, 0x93, 0xc2, 0x00, /* sts 0x00C2, r24 ; Set the data bits to 8 */
25 0x84, 0xe5, /* ldi r24, 0x54 */
26 0x80, 0x93, 0xc6, 0x00, /* sts 0x00C6, r24 ; Output 'T' */
30 0x0c, 0xc0, 0x3f, 0x14, /* lu12i.w $t0, 0x1fe00 */
31 0x8c, 0x81, 0x87, 0x03, /* ori $t0, $t0, 0x1e0 */
32 0x0d, 0x50, 0x81, 0x03, /* li.w $t1, 'T' */
33 0x8d, 0x01, 0x00, 0x29, /* st.b $t1, $t0, 0 */
34 0xff, 0xf3, 0xff, 0x53, /* b -16 # loop */
38 0x41, 0xf9, 0xfc, 0x06, 0x00, 0x00, /* lea 0xfc060000,%a0 */
39 0x10, 0x3c, 0x00, 0x54, /* move.b #'T',%d0 */
40 0x11, 0x7c, 0x00, 0x04, 0x00, 0x08, /* move.b #4,8(%a0) Enable TX */
41 0x11, 0x40, 0x00, 0x0c, /* move.b %d0,12(%a0) Print 'T' */
42 0x60, 0xfa /* bra.s loop */
46 0x06, 0x00, 0x00, 0x00, /* Initial SP */
47 0x01, 0x00, 0x00, 0x08, /* Initial PC */
48 0x41, 0xf9, 0x02, 0x11, 0x80, 0x00, /* lea 0x02118000,%a0 */
49 0x10, 0x3c, 0x00, 0x54, /* move.b #'T',%d0 */
50 0x11, 0x7c, 0x00, 0x05, 0x00, 0x01, /* move.b #5,1(%a0) Sel TXCTRL */
51 0x11, 0x7c, 0x00, 0x68, 0x00, 0x01, /* move.b #0x68,1(%a0) Enable TX */
52 0x11, 0x40, 0x00, 0x03, /* move.b %d0,3(%a0) Print 'T' */
53 0x60, 0xfa /* bra.s loop */
57 0xb0, 0x00, 0x84, 0x00, /* imm 0x8400 */
58 0x30, 0x60, 0x00, 0x04, /* addik r3,r0,4 */
59 0x30, 0x80, 0x00, 0x54, /* addik r4,r0,'T' */
60 0xf0, 0x83, 0x00, 0x00, /* sbi r4,r3,0 */
61 0xb8, 0x00, 0xff, 0xfc /* bri -4 loop */
65 0xe0, 0x83, 0x00, 0xb0, /* imm 0x83e0 */
66 0x00, 0x10, 0x60, 0x30, /* addik r3,r0,0x1000 */
67 0x54, 0x00, 0x80, 0x30, /* addik r4,r0,'T' */
68 0x00, 0x00, 0x83, 0xf0, /* sbi r4,r3,0 */
69 0xfc, 0xff, 0x00, 0xb8 /* bri -4 loop */
73 0x08, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get base */
74 0x54, 0x20, 0xa0, 0xe3, /* mov r2,#'T' */
75 0x00, 0x20, 0xc3, 0xe5, /* strb r2,[r3] */
76 0xfb, 0xff, 0xff, 0xea, /* b loop */
77 0x00, 0x10, 0x20, 0x3f, /* 0x3f201000 = UART0 base addr */
81 0x81, 0x0a, 0x80, 0x52, /* mov w1, #0x54 */
82 0x02, 0x20, 0xa1, 0xd2, /* mov x2, #0x9000000 */
83 0x41, 0x00, 0x00, 0x39, /* strb w1, [x2] */
84 0xfd, 0xff, 0xff, 0x17, /* b -12 (loop) */
88 0x00, 0x00, 0x00, 0x00, /* Stack top address */
89 0x09, 0x00, 0x00, 0x00, /* Reset handler address */
90 0x04, 0x4a, /* ldr r2, [pc, #16] Get ENABLE */
91 0x04, 0x21, /* movs r1, #4 */
92 0x11, 0x60, /* str r1, [r2] */
93 0x04, 0x4a, /* ldr r2, [pc, #16] Get STARTTX */
94 0x01, 0x21, /* movs r1, #1 */
95 0x11, 0x60, /* str r1, [r2] */
96 0x03, 0x4a, /* ldr r2, [pc, #12] Get TXD */
97 0x54, 0x21, /* movs r1, 'T' */
98 0x11, 0x60, /* str r1, [r2] */
99 0xfe, 0xe7, /* b . */
100 0x00, 0x25, 0x00, 0x40, /* 0x40002500 = UART ENABLE */
101 0x08, 0x20, 0x00, 0x40, /* 0x40002008 = UART STARTTX */
102 0x1c, 0x25, 0x00, 0x40 /* 0x4000251c = UART TXD */
106 0x00, 0x00, 0x00, 0x00, /* Stack top address */
107 0x1d, 0x00, 0x00, 0x00, /* Reset handler address */
108 0x00, 0x00, 0x00, 0x00, /* NMI */
109 0x00, 0x00, 0x00, 0x00, /* Hard fault */
110 0x00, 0x00, 0x00, 0x00, /* Memory management fault */
111 0x00, 0x00, 0x00, 0x00, /* Bus fault */
112 0x00, 0x00, 0x00, 0x00, /* Usage fault */
113 0x0b, 0x4b, /* ldr r3, [pc, #44] Get RCC */
114 0x44, 0xf2, 0x04, 0x02, /* movw r2, #16388 */
115 0x1a, 0x60, /* str r2, [r3] */
116 0x0a, 0x4b, /* ldr r3, [pc, #40] Get GPIOA */
117 0x1a, 0x68, /* ldr r2, [r3] */
118 0x22, 0xf0, 0xf0, 0x02, /* bic r2, r2, #240 */
119 0x1a, 0x60, /* str r2, [r3] */
120 0x1a, 0x68, /* ldr r2, [r3] */
121 0x42, 0xf0, 0xb0, 0x02, /* orr r2, r2, #176 */
122 0x1a, 0x60, /* str r2, [r3] */
123 0x07, 0x4b, /* ldr r3, [pc, #26] Get BAUD */
124 0x45, 0x22, /* movs r2, #69 */
125 0x1a, 0x60, /* str r2, [r3] */
126 0x06, 0x4b, /* ldr r3, [pc, #24] Get ENABLE */
127 0x42, 0xf2, 0x08, 0x02, /* movw r2, #8200 */
128 0x1a, 0x60, /* str r2, [r3] */
129 0x05, 0x4b, /* ldr r3, [pc, #20] Get TXD */
130 0x54, 0x22, /* movs r2, 'T' */
131 0x1a, 0x60, /* str r2, [r3] */
132 0xfe, 0xe7, /* b . */
133 0x18, 0x10, 0x02, 0x40, /* 0x40021018 = RCC */
134 0x04, 0x08, 0x01, 0x40, /* 0x40010804 = GPIOA */
135 0x08, 0x38, 0x01, 0x40, /* 0x40013808 = USART1 BAUD */
136 0x0c, 0x38, 0x01, 0x40, /* 0x4001380c = USART1 ENABLE */
137 0x04, 0x38, 0x01, 0x40 /* 0x40013804 = USART1 TXD */
181 { "m68k", "next-cube", "", "TT", sizeof(bios_nextcube), 0, bios_nextcube },
186 { "arm", "raspi2b", "", "TT", sizeof(bios_raspi2), 0, bios_raspi2 },
200 int nbr = 0, pos = 0, ccnt; in check_guest_output()
206 ccnt = 0; in check_guest_output()
210 if (test->expect[pos] == '\0') { in check_guest_output()
215 pos = 0; in check_guest_output()
218 g_assert(nbr >= 0); in check_guest_output()
302 return 0; in main()
305 for (i = 0; tests[i].arch != NULL; i++) { in main()