42         tcg_debug_assert(a_bits + 5 <= tcg_ctx->page_bits);  in check_max_alignment()
82     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_canonicalize_memop()
93     if (TCG_TARGET_REG_BITS == 64 || tcg_ctx->addr_type == TCG_TYPE_I32) {  in gen_ldst()
126     type &= tcg_ctx->guest_mo;  in tcg_gen_req_mo()
137     if (tcg_ctx->plugin_insn != NULL) {  in plugin_maybe_preserve_addr()
140         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in plugin_maybe_preserve_addr()
156     if (tcg_ctx->plugin_insn != NULL) {  in plugin_gen_mem_callbacks()
159         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in plugin_gen_mem_callbacks()
200     if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i32_int()
227     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_ld_i32_chk()
261         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i32_int()
267         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i32_int()
284     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_st_i32_chk()
321     if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i64_int()
352     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_ld_i64_chk()
393     if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i64_int()
409     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_st_i64_chk()
490     if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in maybe_extend_addr64()
500     if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in maybe_free_addr64()
516     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_gen_qemu_ld_i128_int()
538         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i128_int()
558         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i128_int()
583         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i128_int()
600         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_ld_i128_int()
615     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_ld_i128_chk()
632     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_gen_qemu_st_i128_int()
657         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i128_int()
675         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i128_int()
697         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i128_int()
716         if (tcg_ctx->addr_type == TCG_TYPE_I32) {  in tcg_gen_qemu_st_i128_int()
731     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_qemu_st_i128_chk()
852     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_nonatomic_cmpxchg_i32_chk()
865     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_gen_atomic_cmpxchg_i32_int()
889     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_atomic_cmpxchg_i32_chk()
934     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_nonatomic_cmpxchg_i64_chk()
943     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_gen_atomic_cmpxchg_i64_int()
1005     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_atomic_cmpxchg_i64_chk()
1058     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_nonatomic_cmpxchg_i128_chk()
1069     if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) {  in tcg_gen_atomic_cmpxchg_i128_int()
1099     tcg_debug_assert(addr_type == tcg_ctx->addr_type);  in tcg_gen_atomic_cmpxchg_i128_chk()
1215     tcg_debug_assert(addr_type == tcg_ctx->addr_type);                  \
1217     if (tcg_ctx->gen_tb->cflags & CF_PARALLEL) {                        \
1228     tcg_debug_assert(addr_type == tcg_ctx->addr_type);                  \
1230     if (tcg_ctx->gen_tb->cflags & CF_PARALLEL) {                        \