tcg/aarch64/tcg-target.c.inc

75 #define TCG_REG_TMP0 TCG_REG_X16
1056     TCGReg temp = TCG_REG_TMP0;
1208     tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, offset);
1209     tcg_out_ldst_r(s, insn, rd, rn, TCG_TYPE_I64, TCG_REG_TMP0);
1419         tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, (intptr_t)target);
1420         tcg_out_insn(s, 3207, BLR, TCG_REG_TMP0);
1603         rl = TCG_REG_TMP0;
1620             al = TCG_REG_TMP0;
1661         a1 = TCG_REG_TMP0;
1670         tcg_out_insn(s, 3507, CLZ, ext, TCG_REG_TMP0, a1);
1683         tcg_out_insn_3506(s, sel, ext, d, TCG_REG_TMP0, b, TCG_COND_NE);
1700     .ntmp = 1, .tmp = { TCG_REG_TMP0 }
1775         tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0,
1780                      TCG_REG_TMP0, TCG_REG_TMP0, addr_reg,
1784         tcg_out_insn(s, 3502, ADD, 1, TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP0);
1788         tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP1,
1814         tcg_out_cmp(s, addr_type, TCG_COND_NE, TCG_REG_TMP0, TCG_REG_TMP2, 0);
2006             tcg_debug_assert(base != TCG_REG_TMP0 && base != TCG_REG_TMP1);
2007             ll = TCG_REG_TMP0;
2014         tcg_out_insn(s, 3306, STXP, TCG_REG_TMP0, sl, sh, base);
2015         tcg_out_insn(s, 3201, CBNZ, 0, TCG_REG_TMP0, -2);
2063         QEMU_BUILD_BUG_ON(TCG_REG_TMP0 != TCG_REG_X16);
2064         tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, (intptr_t)target);
2065         tcg_out_insn(s, 3207, BR, TCG_REG_TMP0);
2081     tcg_out_insn(s, 3207, BR, TCG_REG_TMP0);
2101         insn = deposit32(I3305_LDR | TCG_REG_TMP0, 5, 19, i_offset >> 2);
2295         tcg_out_insn(s, 3508, SDIV, ext, TCG_REG_TMP0, a1, a2);
2296         tcg_out_insn(s, 3509, MSUB, ext, a0, TCG_REG_TMP0, a2, a1);
2300         tcg_out_insn(s, 3508, UDIV, ext, TCG_REG_TMP0, a1, a2);
2301         tcg_out_insn(s, 3509, MSUB, ext, a0, TCG_REG_TMP0, a2, a1);
2345             tcg_out_insn(s, 3502, SUB, 0, TCG_REG_TMP0, TCG_REG_XZR, a2);
2346             tcg_out_insn(s, 3508, RORV, ext, a0, a1, TCG_REG_TMP0);
3186     tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);