Lines Matching full:static

31 static xtensa_sysreg_internal sysregs[] = {
112 static xtensa_state_internal states[] = {
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1640 static xtensa_funcUnit_internal funcUnits[] = {
1652 static xtensa_regfile_internal regfiles[] = {
1660 static xtensa_interface_internal interfaces[] = {
1672 static const unsigned CONST_TBL_ai4c_0[] = {
1693 static const unsigned CONST_TBL_b4c_0[] = {
1714 static const unsigned CONST_TBL_b4cu_0[] = {
1737 static int
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2667 static int
2674 static int
2681 static xtensa_operand_internal operands[] = {
3011 static xtensa_arg_internal Iclass_xt_iclass_rfe_stateArgs[] = {
3017 static xtensa_arg_internal Iclass_xt_iclass_rfde_stateArgs[] = {
3023 static xtensa_arg_internal Iclass_xt_iclass_call12_args[] = {
3028 static xtensa_arg_internal Iclass_xt_iclass_call12_stateArgs[] = {
3032 static xtensa_arg_internal Iclass_xt_iclass_call8_args[] = {
3037 static xtensa_arg_internal Iclass_xt_iclass_call8_stateArgs[] = {
3041 static xtensa_arg_internal Iclass_xt_iclass_call4_args[] = {
3046 static xtensa_arg_internal Iclass_xt_iclass_call4_stateArgs[] = {
3050 static xtensa_arg_internal Iclass_xt_iclass_callx12_args[] = {
3055 static xtensa_arg_internal Iclass_xt_iclass_callx12_stateArgs[] = {
3059 static xtensa_arg_internal Iclass_xt_iclass_callx8_args[] = {
3064 static xtensa_arg_internal Iclass_xt_iclass_callx8_stateArgs[] = {
3068 static xtensa_arg_internal Iclass_xt_iclass_callx4_args[] = {
3073 static xtensa_arg_internal Iclass_xt_iclass_callx4_stateArgs[] = {
3077 static xtensa_arg_internal Iclass_xt_iclass_entry_args[] = {
3083 static xtensa_arg_internal Iclass_xt_iclass_entry_stateArgs[] = {
3091 static xtensa_arg_internal Iclass_xt_iclass_movsp_args[] = {
3096 static xtensa_arg_internal Iclass_xt_iclass_movsp_stateArgs[] = {
3101 static xtensa_arg_internal Iclass_xt_iclass_rotw_args[] = {
3105 static xtensa_arg_internal Iclass_xt_iclass_rotw_stateArgs[] = {
3111 static xtensa_arg_internal Iclass_xt_iclass_retw_args[] = {
3115 static xtensa_arg_internal Iclass_xt_iclass_retw_stateArgs[] = {
3122 static xtensa_arg_internal Iclass_xt_iclass_rfwou_stateArgs[] = {
3131 static xtensa_arg_internal Iclass_xt_iclass_l32e_args[] = {
3137 static xtensa_arg_internal Iclass_xt_iclass_l32e_stateArgs[] = {
3142 static xtensa_arg_internal Iclass_xt_iclass_s32e_args[] = {
3148 static xtensa_arg_internal Iclass_xt_iclass_s32e_stateArgs[] = {
3153 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_args[] = {
3157 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_stateArgs[] = {
3163 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_args[] = {
3167 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_stateArgs[] = {
3173 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_args[] = {
3177 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_stateArgs[] = {
3183 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_args[] = {
3187 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_stateArgs[] = {
3193 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_args[] = {
3197 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_stateArgs[] = {
3203 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_args[] = {
3207 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_stateArgs[] = {
3213 static xtensa_arg_internal Iclass_xt_iclass_add_n_args[] = {
3219 static xtensa_arg_internal Iclass_xt_iclass_addi_n_args[] = {
3225 static xtensa_arg_internal Iclass_xt_iclass_bz6_args[] = {
3230 static xtensa_arg_internal Iclass_xt_iclass_loadi4_args[] = {
3236 static xtensa_arg_internal Iclass_xt_iclass_mov_n_args[] = {
3241 static xtensa_arg_internal Iclass_xt_iclass_movi_n_args[] = {
3246 static xtensa_arg_internal Iclass_xt_iclass_retn_args[] = {
3250 static xtensa_arg_internal Iclass_xt_iclass_storei4_args[] = {
3256 static xtensa_arg_internal Iclass_rur_threadptr_args[] = {
3260 static xtensa_arg_internal Iclass_rur_threadptr_stateArgs[] = {
3264 static xtensa_arg_internal Iclass_wur_threadptr_args[] = {
3268 static xtensa_arg_internal Iclass_wur_threadptr_stateArgs[] = {
3272 static xtensa_arg_internal Iclass_xt_iclass_addi_args[] = {
3278 static xtensa_arg_internal Iclass_xt_iclass_addmi_args[] = {
3284 static xtensa_arg_internal Iclass_xt_iclass_addsub_args[] = {
3290 static xtensa_arg_internal Iclass_xt_iclass_bit_args[] = {
3296 static xtensa_arg_internal Iclass_xt_iclass_bsi8_args[] = {
3302 static xtensa_arg_internal Iclass_xt_iclass_bsi8b_args[] = {
3308 static xtensa_arg_internal Iclass_xt_iclass_bsi8u_args[] = {
3314 static xtensa_arg_internal Iclass_xt_iclass_bst8_args[] = {
3320 static xtensa_arg_internal Iclass_xt_iclass_bsz12_args[] = {
3325 static xtensa_arg_internal Iclass_xt_iclass_call0_args[] = {
3330 static xtensa_arg_internal Iclass_xt_iclass_callx0_args[] = {
3335 static xtensa_arg_internal Iclass_xt_iclass_exti_args[] = {
3342 static xtensa_arg_internal Iclass_xt_iclass_jump_args[] = {
3346 static xtensa_arg_internal Iclass_xt_iclass_jumpx_args[] = {
3350 static xtensa_arg_internal Iclass_xt_iclass_l16ui_args[] = {
3356 static xtensa_arg_internal Iclass_xt_iclass_l16si_args[] = {
3362 static xtensa_arg_internal Iclass_xt_iclass_l32i_args[] = {
3368 static xtensa_arg_internal Iclass_xt_iclass_l32r_args[] = {
3373 static xtensa_arg_internal Iclass_xt_iclass_l32r_stateArgs[] = {
3378 static xtensa_arg_internal Iclass_xt_iclass_l8i_args[] = {
3384 static xtensa_arg_internal Iclass_xt_iclass_loop_args[] = {
3389 static xtensa_arg_internal Iclass_xt_iclass_loop_stateArgs[] = {
3395 static xtensa_arg_internal Iclass_xt_iclass_loopz_args[] = {
3400 static xtensa_arg_internal Iclass_xt_iclass_loopz_stateArgs[] = {
3406 static xtensa_arg_internal Iclass_xt_iclass_movi_args[] = {
3411 static xtensa_arg_internal Iclass_xt_iclass_movz_args[] = {
3417 static xtensa_arg_internal Iclass_xt_iclass_neg_args[] = {
3422 static xtensa_arg_internal Iclass_xt_iclass_return_args[] = {
3426 static xtensa_arg_internal Iclass_xt_iclass_s16i_args[] = {
3432 static xtensa_arg_internal Iclass_xt_iclass_s32i_args[] = {
3438 static xtensa_arg_internal Iclass_xt_iclass_s8i_args[] = {
3444 static xtensa_arg_internal Iclass_xt_iclass_sar_args[] = {
3448 static xtensa_arg_internal Iclass_xt_iclass_sar_stateArgs[] = {
3452 static xtensa_arg_internal Iclass_xt_iclass_sari_args[] = {
3456 static xtensa_arg_internal Iclass_xt_iclass_sari_stateArgs[] = {
3460 static xtensa_arg_internal Iclass_xt_iclass_shifts_args[] = {
3465 static xtensa_arg_internal Iclass_xt_iclass_shifts_stateArgs[] = {
3469 static xtensa_arg_internal Iclass_xt_iclass_shiftst_args[] = {
3475 static xtensa_arg_internal Iclass_xt_iclass_shiftst_stateArgs[] = {
3479 static xtensa_arg_internal Iclass_xt_iclass_shiftt_args[] = {
3484 static xtensa_arg_internal Iclass_xt_iclass_shiftt_stateArgs[] = {
3488 static xtensa_arg_internal Iclass_xt_iclass_slli_args[] = {
3494 static xtensa_arg_internal Iclass_xt_iclass_srai_args[] = {
3500 static xtensa_arg_internal Iclass_xt_iclass_srli_args[] = {
3506 static xtensa_arg_internal Iclass_xt_iclass_sync_stateArgs[] = {
3510 static xtensa_arg_internal Iclass_xt_iclass_rsil_args[] = {
3515 static xtensa_arg_internal Iclass_xt_iclass_rsil_stateArgs[] = {
3525 static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_args[] = {
3529 static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_stateArgs[] = {
3533 static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_args[] = {
3537 static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_stateArgs[] = {
3541 static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_args[] = {
3545 static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_stateArgs[] = {
3549 static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_args[] = {
3553 static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_stateArgs[] = {
3557 static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_args[] = {
3561 static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_stateArgs[] = {
3566 static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_args[] = {
3570 static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_stateArgs[] = {
3575 static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_args[] = {
3579 static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_stateArgs[] = {
3583 static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_args[] = {
3587 static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_stateArgs[] = {
3591 static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_args[] = {
3595 static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_stateArgs[] = {
3599 static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_args[] = {
3603 static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_stateArgs[] = {
3607 static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_args[] = {
3611 static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_stateArgs[] = {
3616 static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_args[] = {
3620 static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_stateArgs[] = {
3624 static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_args[] = {
3628 static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_stateArgs[] = {
3633 static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_args[] = {
3637 static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_stateArgs[] = {
3642 static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_args[] = {
3646 static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_stateArgs[] = {
3651 static xtensa_arg_internal Iclass_xt_iclass_rsr_176_args[] = {
3655 static xtensa_arg_internal Iclass_xt_iclass_rsr_176_stateArgs[] = {
3660 static xtensa_arg_internal Iclass_xt_iclass_wsr_176_args[] = {
3664 static xtensa_arg_internal Iclass_xt_iclass_wsr_176_stateArgs[] = {
3669 static xtensa_arg_internal Iclass_xt_iclass_rsr_208_args[] = {
3673 static xtensa_arg_internal Iclass_xt_iclass_rsr_208_stateArgs[] = {
3678 static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_args[] = {
3682 static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_stateArgs[] = {
3692 static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_args[] = {
3696 static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_stateArgs[] = {
3706 static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_args[] = {
3710 static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_stateArgs[] = {
3720 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_args[] = {
3724 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_stateArgs[] = {
3730 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_args[] = {
3734 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_stateArgs[] = {
3740 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_args[] = {
3744 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_stateArgs[] = {
3750 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_args[] = {
3754 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_stateArgs[] = {
3760 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_args[] = {
3764 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_stateArgs[] = {
3770 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_args[] = {
3774 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_stateArgs[] = {
3780 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_args[] = {
3784 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_stateArgs[] = {
3790 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_args[] = {
3794 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_stateArgs[] = {
3800 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_args[] = {
3804 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_stateArgs[] = {
3810 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_args[] = {
3814 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_stateArgs[] = {
3820 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_args[] = {
3824 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_stateArgs[] = {
3830 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_args[] = {
3834 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_stateArgs[] = {
3840 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_args[] = {
3844 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_stateArgs[] = {
3850 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_args[] = {
3854 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_stateArgs[] = {
3860 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_args[] = {
3864 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_stateArgs[] = {
3870 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_args[] = {
3874 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_stateArgs[] = {
3880 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_args[] = {
3884 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_stateArgs[] = {
3890 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_args[] = {
3894 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_stateArgs[] = {
3900 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_args[] = {
3904 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_stateArgs[] = {
3910 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_args[] = {
3914 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_stateArgs[] = {
3920 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_args[] = {
3924 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_stateArgs[] = {
3930 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_args[] = {
3934 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_stateArgs[] = {
3940 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_args[] = {
3944 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_stateArgs[] = {
3950 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_args[] = {
3954 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_stateArgs[] = {
3960 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_args[] = {
3964 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_stateArgs[] = {
3970 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_args[] = {
3974 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_stateArgs[] = {
3980 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_args[] = {
3984 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_stateArgs[] = {
3990 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_args[] = {
3994 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_stateArgs[] = {
4000 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_args[] = {
4004 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_stateArgs[] = {
4010 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_args[] = {
4014 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_stateArgs[] = {
4020 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_args[] = {
4024 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_stateArgs[] = {
4030 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_args[] = {
4034 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_stateArgs[] = {
4040 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_args[] = {
4044 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_stateArgs[] = {
4050 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_args[] = {
4054 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_stateArgs[] = {
4060 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_args[] = {
4064 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_stateArgs[] = {
4070 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_args[] = {
4074 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_stateArgs[] = {
4080 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_args[] = {
4084 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_stateArgs[] = {
4090 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_args[] = {
4094 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_stateArgs[] = {
4100 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_args[] = {
4104 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_stateArgs[] = {
4110 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_args[] = {
4114 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_stateArgs[] = {
4120 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_args[] = {
4124 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_stateArgs[] = {
4130 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_args[] = {
4134 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_stateArgs[] = {
4140 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_args[] = {
4144 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_stateArgs[] = {
4150 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_args[] = {
4154 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_stateArgs[] = {
4160 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_args[] = {
4164 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_stateArgs[] = {
4170 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_args[] = {
4174 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_stateArgs[] = {
4180 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_args[] = {
4184 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_stateArgs[] = {
4190 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_args[] = {
4194 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_stateArgs[] = {
4200 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_args[] = {
4204 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_stateArgs[] = {
4210 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_args[] = {
4214 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_stateArgs[] = {
4220 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_args[] = {
4224 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_stateArgs[] = {
4230 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_args[] = {
4234 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_stateArgs[] = {
4240 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_args[] = {
4244 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_stateArgs[] = {
4250 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_args[] = {
4254 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_stateArgs[] = {
4260 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_args[] = {
4264 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_stateArgs[] = {
4270 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_args[] = {
4274 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_stateArgs[] = {
4280 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_args[] = {
4284 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_stateArgs[] = {
4290 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_args[] = {
4294 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_stateArgs[] = {
4300 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_args[] = {
4304 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_stateArgs[] = {
4310 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_args[] = {
4314 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_stateArgs[] = {
4320 static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_args[] = {
4324 static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_stateArgs[] = {
4330 static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_args[] = {
4334 static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_stateArgs[] = {
4340 static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_args[] = {
4344 static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_stateArgs[] = {
4350 static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_args[] = {
4354 static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_stateArgs[] = {
4360 static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_args[] = {
4364 static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_stateArgs[] = {
4370 static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_args[] = {
4374 static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_stateArgs[] = {
4380 static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_args[] = {
4384 static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_stateArgs[] = {
4391 static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_args[] = {
4395 static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_stateArgs[] = {
4401 static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_args[] = {
4405 static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_stateArgs[] = {
4411 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_args[] = {
4415 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_stateArgs[] = {
4421 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_args[] = {
4425 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_stateArgs[] = {
4431 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_args[] = {
4435 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_stateArgs[] = {
4441 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_args[] = {
4445 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_stateArgs[] = {
4451 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_args[] = {
4455 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_stateArgs[] = {
4461 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_args[] = {
4465 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_stateArgs[] = {
4471 static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_args[] = {
4475 static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_stateArgs[] = {
4480 static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_args[] = {
4484 static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_stateArgs[] = {
4490 static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_args[] = {
4494 static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_stateArgs[] = {
4500 static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_args[] = {
4504 static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_stateArgs[] = {
4510 static xtensa_arg_internal Iclass_xt_mul16_args[] = {
4516 static xtensa_arg_internal Iclass_xt_mul32_args[] = {
4522 static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_args[] = {
4527 static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_stateArgs[] = {
4531 static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_args[] = {
4536 static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_stateArgs[] = {
4540 static xtensa_arg_internal Iclass_xt_iclass_mac16_da_args[] = {
4545 static xtensa_arg_internal Iclass_xt_iclass_mac16_da_stateArgs[] = {
4549 static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_args[] = {
4554 static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_stateArgs[] = {
4558 static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_args[] = {
4563 static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_stateArgs[] = {
4567 static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_args[] = {
4572 static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_stateArgs[] = {
4576 static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_args[] = {
4581 static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_stateArgs[] = {
4585 static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_args[] = {
4590 static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_stateArgs[] = {
4594 static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_args[] = {
4601 static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_stateArgs[] = {
4605 static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_args[] = {
4612 static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_stateArgs[] = {
4616 static xtensa_arg_internal Iclass_xt_iclass_mac16_l_args[] = {
4621 static xtensa_arg_internal Iclass_xt_iclass_rsr_m0_args[] = {
4626 static xtensa_arg_internal Iclass_xt_iclass_wsr_m0_args[] = {
4631 static xtensa_arg_internal Iclass_xt_iclass_xsr_m0_args[] = {
4636 static xtensa_arg_internal Iclass_xt_iclass_rsr_m1_args[] = {
4641 static xtensa_arg_internal Iclass_xt_iclass_wsr_m1_args[] = {
4646 static xtensa_arg_internal Iclass_xt_iclass_xsr_m1_args[] = {
4651 static xtensa_arg_internal Iclass_xt_iclass_rsr_m2_args[] = {
4656 static xtensa_arg_internal Iclass_xt_iclass_wsr_m2_args[] = {
4661 static xtensa_arg_internal Iclass_xt_iclass_xsr_m2_args[] = {
4666 static xtensa_arg_internal Iclass_xt_iclass_rsr_m3_args[] = {
4671 static xtensa_arg_internal Iclass_xt_iclass_wsr_m3_args[] = {
4676 static xtensa_arg_internal Iclass_xt_iclass_xsr_m3_args[] = {
4681 static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_args[] = {
4685 static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_stateArgs[] = {
4689 static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_args[] = {
4693 static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_stateArgs[] = {
4697 static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_args[] = {
4701 static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_stateArgs[] = {
4705 static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_args[] = {
4709 static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_stateArgs[] = {
4713 static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_args[] = {
4717 static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_stateArgs[] = {
4721 static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_args[] = {
4725 static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_stateArgs[] = {
4729 static xtensa_arg_internal Iclass_xt_iclass_rfi_args[] = {
4733 static xtensa_arg_internal Iclass_xt_iclass_rfi_stateArgs[] = {
4757 static xtensa_arg_internal Iclass_xt_iclass_wait_args[] = {
4761 static xtensa_arg_internal Iclass_xt_iclass_wait_stateArgs[] = {
4767 static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_args[] = {
4771 static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_stateArgs[] = {
4777 static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_args[] = {
4781 static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_stateArgs[] = {
4788 static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_args[] = {
4792 static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_stateArgs[] = {
4799 static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_args[] = {
4803 static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_stateArgs[] = {
4809 static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_args[] = {
4813 static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_stateArgs[] = {
4819 static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_args[] = {
4823 static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_stateArgs[] = {
4829 static xtensa_arg_internal Iclass_xt_iclass_break_args[] = {
4834 static xtensa_arg_internal Iclass_xt_iclass_break_stateArgs[] = {
4839 static xtensa_arg_internal Iclass_xt_iclass_break_n_args[] = {
4843 static xtensa_arg_internal Iclass_xt_iclass_break_n_stateArgs[] = {
4848 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_args[] = {
4852 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_stateArgs[] = {
4858 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_args[] = {
4862 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_stateArgs[] = {
4869 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_args[] = {
4873 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_stateArgs[] = {
4880 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_args[] = {
4884 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_stateArgs[] = {
4890 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_args[] = {
4894 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_stateArgs[] = {
4901 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_args[] = {
4905 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_stateArgs[] = {
4912 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_args[] = {
4916 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_stateArgs[] = {
4922 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_args[] = {
4926 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_stateArgs[] = {
4933 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_args[] = {
4937 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_stateArgs[] = {
4944 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_args[] = {
4948 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_stateArgs[] = {
4954 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_args[] = {
4958 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_stateArgs[] = {
4965 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_args[] = {
4969 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_stateArgs[] = {
4976 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_args[] = {
4980 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_stateArgs[] = {
4986 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_args[] = {
4990 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_stateArgs[] = {
4996 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_args[] = {
5000 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_stateArgs[] = {
5006 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_args[] = {
5010 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_stateArgs[] = {
5016 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_args[] = {
5020 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_stateArgs[] = {
5026 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_args[] = {
5030 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_stateArgs[] = {
5036 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_args[] = {
5040 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_stateArgs[] = {
5046 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_args[] = {
5050 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_stateArgs[] = {
5056 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_args[] = {
5060 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_stateArgs[] = {
5066 static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_args[] = {
5070 static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_stateArgs[] = {
5077 static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_args[] = {
5081 static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_stateArgs[] = {
5088 static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_args[] = {
5092 static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_stateArgs[] = {
5099 static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_args[] = {
5103 static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_stateArgs[] = {
5109 static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_args[] = {
5113 static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_stateArgs[] = {
5120 static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_args[] = {
5124 static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_stateArgs[] = {
5131 static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_args[] = {
5135 static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_stateArgs[] = {
5141 static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_args[] = {
5145 static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_stateArgs[] = {
5151 static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_args[] = {
5155 static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_stateArgs[] = {
5161 static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_args[] = {
5165 static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_stateArgs[] = {
5171 static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_args[] = {
5175 static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_stateArgs[] = {
5182 static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_args[] = {
5186 static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_stateArgs[] = {
5193 static xtensa_arg_internal Iclass_xt_iclass_rfdo_args[] = {
5197 static xtensa_arg_internal Iclass_xt_iclass_rfdo_stateArgs[] = {
5210 static xtensa_arg_internal Iclass_xt_iclass_rfdd_stateArgs[] = {
5214 static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_args[] = {
5218 static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_stateArgs[] = {
5224 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_args[] = {
5228 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_stateArgs[] = {
5234 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_args[] = {
5238 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_stateArgs[] = {
5245 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_args[] = {
5249 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_stateArgs[] = {
5256 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_args[] = {
5260 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_stateArgs[] = {
5266 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_args[] = {
5270 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_stateArgs[] = {
5277 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_args[] = {
5281 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_stateArgs[] = {
5288 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_args[] = {
5292 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_stateArgs[] = {
5298 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_args[] = {
5302 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_stateArgs[] = {
5309 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_args[] = {
5313 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_stateArgs[] = {
5320 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_args[] = {
5324 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_stateArgs[] = {
5330 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_args[] = {
5334 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_stateArgs[] = {
5341 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_args[] = {
5345 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_stateArgs[] = {
5352 static xtensa_arg_internal Iclass_xt_iclass_icache_args[] = {
5357 static xtensa_arg_internal Iclass_xt_iclass_icache_lock_args[] = {
5362 static xtensa_arg_internal Iclass_xt_iclass_icache_lock_stateArgs[] = {
5367 static xtensa_arg_internal Iclass_xt_iclass_icache_inv_args[] = {
5372 static xtensa_arg_internal Iclass_xt_iclass_icache_inv_stateArgs[] = {
5377 static xtensa_arg_internal Iclass_xt_iclass_licx_args[] = {
5382 static xtensa_arg_internal Iclass_xt_iclass_licx_stateArgs[] = {
5387 static xtensa_arg_internal Iclass_xt_iclass_sicx_args[] = {
5392 static xtensa_arg_internal Iclass_xt_iclass_sicx_stateArgs[] = {
5397 static xtensa_arg_internal Iclass_xt_iclass_dcache_args[] = {
5402 static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_args[] = {
5407 static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_stateArgs[] = {
5412 static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_args[] = {
5417 static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_stateArgs[] = {
5422 static xtensa_arg_internal Iclass_xt_iclass_dpf_args[] = {
5427 static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_args[] = {
5432 static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_stateArgs[] = {
5437 static xtensa_arg_internal Iclass_xt_iclass_sdct_args[] = {
5442 static xtensa_arg_internal Iclass_xt_iclass_sdct_stateArgs[] = {
5447 static xtensa_arg_internal Iclass_xt_iclass_ldct_args[] = {
5452 static xtensa_arg_internal Iclass_xt_iclass_ldct_stateArgs[] = {
5457 static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_args[] = {
5461 static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_stateArgs[] = {
5468 static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_args[] = {
5472 static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_stateArgs[] = {
5479 static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_args[] = {
5483 static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_stateArgs[] = {
5491 static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_args[] = {
5495 static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_stateArgs[] = {
5503 static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_args[] = {
5507 static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_stateArgs[] = {
5516 static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_args[] = {
5520 static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_stateArgs[] = {
5529 static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_args[] = {
5533 static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_stateArgs[] = {
5541 static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_args[] = {
5545 static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_stateArgs[] = {
5554 static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_args[] = {
5558 static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_stateArgs[] = {
5567 static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_args[] = {
5571 static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_stateArgs[] = {
5579 static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_args[] = {
5583 static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_stateArgs[] = {
5592 static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_args[] = {
5596 static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_stateArgs[] = {
5605 static xtensa_arg_internal Iclass_xt_iclass_idtlb_args[] = {
5609 static xtensa_arg_internal Iclass_xt_iclass_idtlb_stateArgs[] = {
5615 static xtensa_arg_internal Iclass_xt_iclass_rdtlb_args[] = {
5620 static xtensa_arg_internal Iclass_xt_iclass_rdtlb_stateArgs[] = {
5625 static xtensa_arg_internal Iclass_xt_iclass_wdtlb_args[] = {
5630 static xtensa_arg_internal Iclass_xt_iclass_wdtlb_stateArgs[] = {
5636 static xtensa_arg_internal Iclass_xt_iclass_iitlb_args[] = {
5640 static xtensa_arg_internal Iclass_xt_iclass_iitlb_stateArgs[] = {
5645 static xtensa_arg_internal Iclass_xt_iclass_ritlb_args[] = {
5650 static xtensa_arg_internal Iclass_xt_iclass_ritlb_stateArgs[] = {
5655 static xtensa_arg_internal Iclass_xt_iclass_witlb_args[] = {
5660 static xtensa_arg_internal Iclass_xt_iclass_witlb_stateArgs[] = {
5665 static xtensa_arg_internal Iclass_xt_iclass_ldpte_stateArgs[] = {
5670 static xtensa_arg_internal Iclass_xt_iclass_hwwitlba_stateArgs[] = {
5674 static xtensa_arg_internal Iclass_xt_iclass_hwwdtlba_stateArgs[] = {
5678 static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_args[] = {
5682 static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_stateArgs[] = {
5688 static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_args[] = {
5692 static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_stateArgs[] = {
5698 static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_args[] = {
5702 static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_stateArgs[] = {
5708 static xtensa_arg_internal Iclass_xt_iclass_clamp_args[] = {
5714 static xtensa_arg_internal Iclass_xt_iclass_minmax_args[] = {
5720 static xtensa_arg_internal Iclass_xt_iclass_nsa_args[] = {
5725 static xtensa_arg_internal Iclass_xt_iclass_sx_args[] = {
5731 static xtensa_arg_internal Iclass_xt_iclass_l32ai_args[] = {
5737 static xtensa_arg_internal Iclass_xt_iclass_s32ri_args[] = {
5743 static xtensa_arg_internal Iclass_xt_iclass_s32c1i_args[] = {
5749 static xtensa_arg_internal Iclass_xt_iclass_s32c1i_stateArgs[] = {
5755 static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_args[] = {
5759 static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_stateArgs[] = {
5763 static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_args[] = {
5767 static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_stateArgs[] = {
5771 static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_args[] = {
5775 static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_stateArgs[] = {
5779 static xtensa_arg_internal Iclass_xt_iclass_rsr_atomctl_args[] = {
5783 static xtensa_arg_internal Iclass_xt_iclass_rsr_atomctl_stateArgs[] = {
5789 static xtensa_arg_internal Iclass_xt_iclass_wsr_atomctl_args[] = {
5793 static xtensa_arg_internal Iclass_xt_iclass_wsr_atomctl_stateArgs[] = {
5800 static xtensa_arg_internal Iclass_xt_iclass_xsr_atomctl_args[] = {
5804 static xtensa_arg_internal Iclass_xt_iclass_xsr_atomctl_stateArgs[] = {
5811 static xtensa_arg_internal Iclass_xt_iclass_div_args[] = {
5817 static xtensa_arg_internal Iclass_xt_iclass_rer_stateArgs[] = {
5822 static xtensa_arg_internal Iclass_xt_iclass_wer_stateArgs[] = {
5827 static xtensa_arg_internal Iclass_rur_expstate_args[] = {
5831 static xtensa_arg_internal Iclass_rur_expstate_stateArgs[] = {
5836 static xtensa_arg_internal Iclass_wur_expstate_args[] = {
5840 static xtensa_arg_internal Iclass_wur_expstate_stateArgs[] = {
5845 static xtensa_arg_internal Iclass_iclass_READ_IMPWIRE_args[] = {
5849 static xtensa_arg_internal Iclass_iclass_READ_IMPWIRE_stateArgs[] = {
5853 static xtensa_interface Iclass_iclass_READ_IMPWIRE_intfArgs[] = {
5857 static xtensa_arg_internal Iclass_iclass_SETB_EXPSTATE_args[] = {
5861 static xtensa_arg_internal Iclass_iclass_SETB_EXPSTATE_stateArgs[] = {
5866 static xtensa_arg_internal Iclass_iclass_CLRB_EXPSTATE_args[] = {
5870 static xtensa_arg_internal Iclass_iclass_CLRB_EXPSTATE_stateArgs[] = {
5875 static xtensa_arg_internal Iclass_iclass_WRMSK_EXPSTATE_args[] = {
5880 static xtensa_arg_internal Iclass_iclass_WRMSK_EXPSTATE_stateArgs[] = {
5885 static xtensa_iclass_internal iclasses[] = {
6872 static void
6878 static void
6884 static void
6890 static void
6896 static void
6902 static void
6908 static void
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6920 static void
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8000 static void
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8300 static void
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8396 static void
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8606 static void
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8636 static void
8642 static void
8648 static void
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8660 static void
8666 static void
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8678 static void
8684 static void
8690 static void
8696 static void
8702 static void
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8714 static void
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8744 static void
8750 static void
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8762 static void
8768 static void
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8780 static void
8786 static void
8792 static void
8798 static void
8804 static void
8810 static void
8816 static void
8822 static void
8828 static void
8834 static void
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8852 static void
8858 static void
8864 static void
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8876 static void
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8894 static void
8900 static void
8906 static void
8912 static void
8918 static void
8924 static void
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8936 static void
8942 static void
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8954 static void
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8990 static void
8996 static void
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9050 static void
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9074 static void
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9098 static void
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9110 static void
9116 static void
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9308 static void
9314 static void
9320 static void
9326 static void
9332 static void
9338 static void
9344 static void
9350 static void
9356 static void
9362 static void
9368 static void
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9380 static void
9386 static void
9392 static void
9398 static void
9404 static void
9410 static void
9416 static void
9422 static void
9428 static void
9434 static void
9440 static void
9446 static void
9452 static void
9458 static void
9464 static void
9470 static void
9476 static void
9482 static void
9488 static void
9494 static void
9500 static void
9506 static void
9512 static void
9518 static void
9524 static void
9530 static void
9536 static void
9542 static void
9548 static void
9554 static void
9560 static void
9566 static void
9572 static void
9578 static void
9584 static xtensa_opcode_encode_fn Opcode_excw_encode_fns[] = {
9588 static xtensa_opcode_encode_fn Opcode_rfe_encode_fns[] = {
9592 static xtensa_opcode_encode_fn Opcode_rfde_encode_fns[] = {
9596 static xtensa_opcode_encode_fn Opcode_syscall_encode_fns[] = {
9600 static xtensa_opcode_encode_fn Opcode_simcall_encode_fns[] = {
9604 static xtensa_opcode_encode_fn Opcode_call12_encode_fns[] = {
9608 static xtensa_opcode_encode_fn Opcode_call8_encode_fns[] = {
9612 static xtensa_opcode_encode_fn Opcode_call4_encode_fns[] = {
9616 static xtensa_opcode_encode_fn Opcode_callx12_encode_fns[] = {
9620 static xtensa_opcode_encode_fn Opcode_callx8_encode_fns[] = {
9624 static xtensa_opcode_encode_fn Opcode_callx4_encode_fns[] = {
9628 static xtensa_opcode_encode_fn Opcode_entry_encode_fns[] = {
9632 static xtensa_opcode_encode_fn Opcode_movsp_encode_fns[] = {
9636 static xtensa_opcode_encode_fn Opcode_rotw_encode_fns[] = {
9640 static xtensa_opcode_encode_fn Opcode_retw_encode_fns[] = {
9644 static xtensa_opcode_encode_fn Opcode_retw_n_encode_fns[] = {
9648 static xtensa_opcode_encode_fn Opcode_rfwo_encode_fns[] = {
9652 static xtensa_opcode_encode_fn Opcode_rfwu_encode_fns[] = {
9656 static xtensa_opcode_encode_fn Opcode_l32e_encode_fns[] = {
9660 static xtensa_opcode_encode_fn Opcode_s32e_encode_fns[] = {
9664 static xtensa_opcode_encode_fn Opcode_rsr_windowbase_encode_fns[] = {
9668 static xtensa_opcode_encode_fn Opcode_wsr_windowbase_encode_fns[] = {
9672 static xtensa_opcode_encode_fn Opcode_xsr_windowbase_encode_fns[] = {
9676 static xtensa_opcode_encode_fn Opcode_rsr_windowstart_encode_fns[] = {
9680 static xtensa_opcode_encode_fn Opcode_wsr_windowstart_encode_fns[] = {
9684 static xtensa_opcode_encode_fn Opcode_xsr_windowstart_encode_fns[] = {
9688 static xtensa_opcode_encode_fn Opcode_add_n_encode_fns[] = {
9692 static xtensa_opcode_encode_fn Opcode_addi_n_encode_fns[] = {
9696 static xtensa_opcode_encode_fn Opcode_beqz_n_encode_fns[] = {
9700 static xtensa_opcode_encode_fn Opcode_bnez_n_encode_fns[] = {
9704 static xtensa_opcode_encode_fn Opcode_ill_n_encode_fns[] = {
9708 static xtensa_opcode_encode_fn Opcode_l32i_n_encode_fns[] = {
9712 static xtensa_opcode_encode_fn Opcode_mov_n_encode_fns[] = {
9716 static xtensa_opcode_encode_fn Opcode_movi_n_encode_fns[] = {
9720 static xtensa_opcode_encode_fn Opcode_nop_n_encode_fns[] = {
9724 static xtensa_opcode_encode_fn Opcode_ret_n_encode_fns[] = {
9728 static xtensa_opcode_encode_fn Opcode_s32i_n_encode_fns[] = {
9732 static xtensa_opcode_encode_fn Opcode_rur_threadptr_encode_fns[] = {
9736 static xtensa_opcode_encode_fn Opcode_wur_threadptr_encode_fns[] = {
9740 static xtensa_opcode_encode_fn Opcode_addi_encode_fns[] = {
9744 static xtensa_opcode_encode_fn Opcode_addmi_encode_fns[] = {
9748 static xtensa_opcode_encode_fn Opcode_add_encode_fns[] = {
9752 static xtensa_opcode_encode_fn Opcode_sub_encode_fns[] = {
9756 static xtensa_opcode_encode_fn Opcode_addx2_encode_fns[] = {
9760 static xtensa_opcode_encode_fn Opcode_addx4_encode_fns[] = {
9764 static xtensa_opcode_encode_fn Opcode_addx8_encode_fns[] = {
9768 static xtensa_opcode_encode_fn Opcode_subx2_encode_fns[] = {
9772 static xtensa_opcode_encode_fn Opcode_subx4_encode_fns[] = {
9776 static xtensa_opcode_encode_fn Opcode_subx8_encode_fns[] = {
9780 static xtensa_opcode_encode_fn Opcode_and_encode_fns[] = {
9784 static xtensa_opcode_encode_fn Opcode_or_encode_fns[] = {
9788 static xtensa_opcode_encode_fn Opcode_xor_encode_fns[] = {
9792 static xtensa_opcode_encode_fn Opcode_beqi_encode_fns[] = {
9796 static xtensa_opcode_encode_fn Opcode_bnei_encode_fns[] = {
9800 static xtensa_opcode_encode_fn Opcode_bgei_encode_fns[] = {
9804 static xtensa_opcode_encode_fn Opcode_blti_encode_fns[] = {
9808 static xtensa_opcode_encode_fn Opcode_bbci_encode_fns[] = {
9812 static xtensa_opcode_encode_fn Opcode_bbsi_encode_fns[] = {
9816 static xtensa_opcode_encode_fn Opcode_bgeui_encode_fns[] = {
9820 static xtensa_opcode_encode_fn Opcode_bltui_encode_fns[] = {
9824 static xtensa_opcode_encode_fn Opcode_beq_encode_fns[] = {
9828 static xtensa_opcode_encode_fn Opcode_bne_encode_fns[] = {
9832 static xtensa_opcode_encode_fn Opcode_bge_encode_fns[] = {
9836 static xtensa_opcode_encode_fn Opcode_blt_encode_fns[] = {
9840 static xtensa_opcode_encode_fn Opcode_bgeu_encode_fns[] = {
9844 static xtensa_opcode_encode_fn Opcode_bltu_encode_fns[] = {
9848 static xtensa_opcode_encode_fn Opcode_bany_encode_fns[] = {
9852 static xtensa_opcode_encode_fn Opcode_bnone_encode_fns[] = {
9856 static xtensa_opcode_encode_fn Opcode_ball_encode_fns[] = {
9860 static xtensa_opcode_encode_fn Opcode_bnall_encode_fns[] = {
9864 static xtensa_opcode_encode_fn Opcode_bbc_encode_fns[] = {
9868 static xtensa_opcode_encode_fn Opcode_bbs_encode_fns[] = {
9872 static xtensa_opcode_encode_fn Opcode_beqz_encode_fns[] = {
9876 static xtensa_opcode_encode_fn Opcode_bnez_encode_fns[] = {
9880 static xtensa_opcode_encode_fn Opcode_bgez_encode_fns[] = {
9884 static xtensa_opcode_encode_fn Opcode_bltz_encode_fns[] = {
9888 static xtensa_opcode_encode_fn Opcode_call0_encode_fns[] = {
9892 static xtensa_opcode_encode_fn Opcode_callx0_encode_fns[] = {
9896 static xtensa_opcode_encode_fn Opcode_extui_encode_fns[] = {
9900 static xtensa_opcode_encode_fn Opcode_ill_encode_fns[] = {
9904 static xtensa_opcode_encode_fn Opcode_j_encode_fns[] = {
9908 static xtensa_opcode_encode_fn Opcode_jx_encode_fns[] = {
9912 static xtensa_opcode_encode_fn Opcode_l16ui_encode_fns[] = {
9916 static xtensa_opcode_encode_fn Opcode_l16si_encode_fns[] = {
9920 static xtensa_opcode_encode_fn Opcode_l32i_encode_fns[] = {
9924 static xtensa_opcode_encode_fn Opcode_l32r_encode_fns[] = {
9928 static xtensa_opcode_encode_fn Opcode_l8ui_encode_fns[] = {
9932 static xtensa_opcode_encode_fn Opcode_loop_encode_fns[] = {
9936 static xtensa_opcode_encode_fn Opcode_loopnez_encode_fns[] = {
9940 static xtensa_opcode_encode_fn Opcode_loopgtz_encode_fns[] = {
9944 static xtensa_opcode_encode_fn Opcode_movi_encode_fns[] = {
9948 static xtensa_opcode_encode_fn Opcode_moveqz_encode_fns[] = {
9952 static xtensa_opcode_encode_fn Opcode_movnez_encode_fns[] = {
9956 static xtensa_opcode_encode_fn Opcode_movltz_encode_fns[] = {
9960 static xtensa_opcode_encode_fn Opcode_movgez_encode_fns[] = {
9964 static xtensa_opcode_encode_fn Opcode_neg_encode_fns[] = {
9968 static xtensa_opcode_encode_fn Opcode_abs_encode_fns[] = {
9972 static xtensa_opcode_encode_fn Opcode_nop_encode_fns[] = {
9976 static xtensa_opcode_encode_fn Opcode_ret_encode_fns[] = {
9980 static xtensa_opcode_encode_fn Opcode_s16i_encode_fns[] = {
9984 static xtensa_opcode_encode_fn Opcode_s32i_encode_fns[] = {
9988 static xtensa_opcode_encode_fn Opcode_s8i_encode_fns[] = {
9992 static xtensa_opcode_encode_fn Opcode_ssr_encode_fns[] = {
9996 static xtensa_opcode_encode_fn Opcode_ssl_encode_fns[] = {
10000 static xtensa_opcode_encode_fn Opcode_ssa8l_encode_fns[] = {
10004 static xtensa_opcode_encode_fn Opcode_ssa8b_encode_fns[] = {
10008 static xtensa_opcode_encode_fn Opcode_ssai_encode_fns[] = {
10012 static xtensa_opcode_encode_fn Opcode_sll_encode_fns[] = {
10016 static xtensa_opcode_encode_fn Opcode_src_encode_fns[] = {
10020 static xtensa_opcode_encode_fn Opcode_srl_encode_fns[] = {
10024 static xtensa_opcode_encode_fn Opcode_sra_encode_fns[] = {
10028 static xtensa_opcode_encode_fn Opcode_slli_encode_fns[] = {
10032 static xtensa_opcode_encode_fn Opcode_srai_encode_fns[] = {
10036 static xtensa_opcode_encode_fn Opcode_srli_encode_fns[] = {
10040 static xtensa_opcode_encode_fn Opcode_memw_encode_fns[] = {
10044 static xtensa_opcode_encode_fn Opcode_extw_encode_fns[] = {
10048 static xtensa_opcode_encode_fn Opcode_isync_encode_fns[] = {
10052 static xtensa_opcode_encode_fn Opcode_rsync_encode_fns[] = {
10056 static xtensa_opcode_encode_fn Opcode_esync_encode_fns[] = {
10060 static xtensa_opcode_encode_fn Opcode_dsync_encode_fns[] = {
10064 static xtensa_opcode_encode_fn Opcode_rsil_encode_fns[] = {
10068 static xtensa_opcode_encode_fn Opcode_rsr_lend_encode_fns[] = {
10072 static xtensa_opcode_encode_fn Opcode_wsr_lend_encode_fns[] = {
10076 static xtensa_opcode_encode_fn Opcode_xsr_lend_encode_fns[] = {
10080 static xtensa_opcode_encode_fn Opcode_rsr_lcount_encode_fns[] = {
10084 static xtensa_opcode_encode_fn Opcode_wsr_lcount_encode_fns[] = {
10088 static xtensa_opcode_encode_fn Opcode_xsr_lcount_encode_fns[] = {
10092 static xtensa_opcode_encode_fn Opcode_rsr_lbeg_encode_fns[] = {
10096 static xtensa_opcode_encode_fn Opcode_wsr_lbeg_encode_fns[] = {
10100 static xtensa_opcode_encode_fn Opcode_xsr_lbeg_encode_fns[] = {
10104 static xtensa_opcode_encode_fn Opcode_rsr_sar_encode_fns[] = {
10108 static xtensa_opcode_encode_fn Opcode_wsr_sar_encode_fns[] = {
10112 static xtensa_opcode_encode_fn Opcode_xsr_sar_encode_fns[] = {
10116 static xtensa_opcode_encode_fn Opcode_rsr_litbase_encode_fns[] = {
10120 static xtensa_opcode_encode_fn Opcode_wsr_litbase_encode_fns[] = {
10124 static xtensa_opcode_encode_fn Opcode_xsr_litbase_encode_fns[] = {
10128 static xtensa_opcode_encode_fn Opcode_rsr_176_encode_fns[] = {
10132 static xtensa_opcode_encode_fn Opcode_wsr_176_encode_fns[] = {
10136 static xtensa_opcode_encode_fn Opcode_rsr_208_encode_fns[] = {
10140 static xtensa_opcode_encode_fn Opcode_rsr_ps_encode_fns[] = {
10144 static xtensa_opcode_encode_fn Opcode_wsr_ps_encode_fns[] = {
10148 static xtensa_opcode_encode_fn Opcode_xsr_ps_encode_fns[] = {
10152 static xtensa_opcode_encode_fn Opcode_rsr_epc1_encode_fns[] = {
10156 static xtensa_opcode_encode_fn Opcode_wsr_epc1_encode_fns[] = {
10160 static xtensa_opcode_encode_fn Opcode_xsr_epc1_encode_fns[] = {
10164 static xtensa_opcode_encode_fn Opcode_rsr_excsave1_encode_fns[] = {
10168 static xtensa_opcode_encode_fn Opcode_wsr_excsave1_encode_fns[] = {
10172 static xtensa_opcode_encode_fn Opcode_xsr_excsave1_encode_fns[] = {
10176 static xtensa_opcode_encode_fn Opcode_rsr_epc2_encode_fns[] = {
10180 static xtensa_opcode_encode_fn Opcode_wsr_epc2_encode_fns[] = {
10184 static xtensa_opcode_encode_fn Opcode_xsr_epc2_encode_fns[] = {
10188 static xtensa_opcode_encode_fn Opcode_rsr_excsave2_encode_fns[] = {
10192 static xtensa_opcode_encode_fn Opcode_wsr_excsave2_encode_fns[] = {
10196 static xtensa_opcode_encode_fn Opcode_xsr_excsave2_encode_fns[] = {
10200 static xtensa_opcode_encode_fn Opcode_rsr_epc3_encode_fns[] = {
10204 static xtensa_opcode_encode_fn Opcode_wsr_epc3_encode_fns[] = {
10208 static xtensa_opcode_encode_fn Opcode_xsr_epc3_encode_fns[] = {
10212 static xtensa_opcode_encode_fn Opcode_rsr_excsave3_encode_fns[] = {
10216 static xtensa_opcode_encode_fn Opcode_wsr_excsave3_encode_fns[] = {
10220 static xtensa_opcode_encode_fn Opcode_xsr_excsave3_encode_fns[] = {
10224 static xtensa_opcode_encode_fn Opcode_rsr_epc4_encode_fns[] = {
10228 static xtensa_opcode_encode_fn Opcode_wsr_epc4_encode_fns[] = {
10232 static xtensa_opcode_encode_fn Opcode_xsr_epc4_encode_fns[] = {
10236 static xtensa_opcode_encode_fn Opcode_rsr_excsave4_encode_fns[] = {
10240 static xtensa_opcode_encode_fn Opcode_wsr_excsave4_encode_fns[] = {
10244 static xtensa_opcode_encode_fn Opcode_xsr_excsave4_encode_fns[] = {
10248 static xtensa_opcode_encode_fn Opcode_rsr_epc5_encode_fns[] = {
10252 static xtensa_opcode_encode_fn Opcode_wsr_epc5_encode_fns[] = {
10256 static xtensa_opcode_encode_fn Opcode_xsr_epc5_encode_fns[] = {
10260 static xtensa_opcode_encode_fn Opcode_rsr_excsave5_encode_fns[] = {
10264 static xtensa_opcode_encode_fn Opcode_wsr_excsave5_encode_fns[] = {
10268 static xtensa_opcode_encode_fn Opcode_xsr_excsave5_encode_fns[] = {
10272 static xtensa_opcode_encode_fn Opcode_rsr_epc6_encode_fns[] = {
10276 static xtensa_opcode_encode_fn Opcode_wsr_epc6_encode_fns[] = {
10280 static xtensa_opcode_encode_fn Opcode_xsr_epc6_encode_fns[] = {
10284 static xtensa_opcode_encode_fn Opcode_rsr_excsave6_encode_fns[] = {
10288 static xtensa_opcode_encode_fn Opcode_wsr_excsave6_encode_fns[] = {
10292 static xtensa_opcode_encode_fn Opcode_xsr_excsave6_encode_fns[] = {
10296 static xtensa_opcode_encode_fn Opcode_rsr_epc7_encode_fns[] = {
10300 static xtensa_opcode_encode_fn Opcode_wsr_epc7_encode_fns[] = {
10304 static xtensa_opcode_encode_fn Opcode_xsr_epc7_encode_fns[] = {
10308 static xtensa_opcode_encode_fn Opcode_rsr_excsave7_encode_fns[] = {
10312 static xtensa_opcode_encode_fn Opcode_wsr_excsave7_encode_fns[] = {
10316 static xtensa_opcode_encode_fn Opcode_xsr_excsave7_encode_fns[] = {
10320 static xtensa_opcode_encode_fn Opcode_rsr_eps2_encode_fns[] = {
10324 static xtensa_opcode_encode_fn Opcode_wsr_eps2_encode_fns[] = {
10328 static xtensa_opcode_encode_fn Opcode_xsr_eps2_encode_fns[] = {
10332 static xtensa_opcode_encode_fn Opcode_rsr_eps3_encode_fns[] = {
10336 static xtensa_opcode_encode_fn Opcode_wsr_eps3_encode_fns[] = {
10340 static xtensa_opcode_encode_fn Opcode_xsr_eps3_encode_fns[] = {
10344 static xtensa_opcode_encode_fn Opcode_rsr_eps4_encode_fns[] = {
10348 static xtensa_opcode_encode_fn Opcode_wsr_eps4_encode_fns[] = {
10352 static xtensa_opcode_encode_fn Opcode_xsr_eps4_encode_fns[] = {
10356 static xtensa_opcode_encode_fn Opcode_rsr_eps5_encode_fns[] = {
10360 static xtensa_opcode_encode_fn Opcode_wsr_eps5_encode_fns[] = {
10364 static xtensa_opcode_encode_fn Opcode_xsr_eps5_encode_fns[] = {
10368 static xtensa_opcode_encode_fn Opcode_rsr_eps6_encode_fns[] = {
10372 static xtensa_opcode_encode_fn Opcode_wsr_eps6_encode_fns[] = {
10376 static xtensa_opcode_encode_fn Opcode_xsr_eps6_encode_fns[] = {
10380 static xtensa_opcode_encode_fn Opcode_rsr_eps7_encode_fns[] = {
10384 static xtensa_opcode_encode_fn Opcode_wsr_eps7_encode_fns[] = {
10388 static xtensa_opcode_encode_fn Opcode_xsr_eps7_encode_fns[] = {
10392 static xtensa_opcode_encode_fn Opcode_rsr_excvaddr_encode_fns[] = {
10396 static xtensa_opcode_encode_fn Opcode_wsr_excvaddr_encode_fns[] = {
10400 static xtensa_opcode_encode_fn Opcode_xsr_excvaddr_encode_fns[] = {
10404 static xtensa_opcode_encode_fn Opcode_rsr_depc_encode_fns[] = {
10408 static xtensa_opcode_encode_fn Opcode_wsr_depc_encode_fns[] = {
10412 static xtensa_opcode_encode_fn Opcode_xsr_depc_encode_fns[] = {
10416 static xtensa_opcode_encode_fn Opcode_rsr_exccause_encode_fns[] = {
10420 static xtensa_opcode_encode_fn Opcode_wsr_exccause_encode_fns[] = {
10424 static xtensa_opcode_encode_fn Opcode_xsr_exccause_encode_fns[] = {
10428 static xtensa_opcode_encode_fn Opcode_rsr_misc0_encode_fns[] = {
10432 static xtensa_opcode_encode_fn Opcode_wsr_misc0_encode_fns[] = {
10436 static xtensa_opcode_encode_fn Opcode_xsr_misc0_encode_fns[] = {
10440 static xtensa_opcode_encode_fn Opcode_rsr_misc1_encode_fns[] = {
10444 static xtensa_opcode_encode_fn Opcode_wsr_misc1_encode_fns[] = {
10448 static xtensa_opcode_encode_fn Opcode_xsr_misc1_encode_fns[] = {
10452 static xtensa_opcode_encode_fn Opcode_rsr_prid_encode_fns[] = {
10456 static xtensa_opcode_encode_fn Opcode_rsr_vecbase_encode_fns[] = {
10460 static xtensa_opcode_encode_fn Opcode_wsr_vecbase_encode_fns[] = {
10464 static xtensa_opcode_encode_fn Opcode_xsr_vecbase_encode_fns[] = {
10468 static xtensa_opcode_encode_fn Opcode_mul16u_encode_fns[] = {
10472 static xtensa_opcode_encode_fn Opcode_mul16s_encode_fns[] = {
10476 static xtensa_opcode_encode_fn Opcode_mull_encode_fns[] = {
10480 static xtensa_opcode_encode_fn Opcode_mul_aa_ll_encode_fns[] = {
10484 static xtensa_opcode_encode_fn Opcode_mul_aa_hl_encode_fns[] = {
10488 static xtensa_opcode_encode_fn Opcode_mul_aa_lh_encode_fns[] = {
10492 static xtensa_opcode_encode_fn Opcode_mul_aa_hh_encode_fns[] = {
10496 static xtensa_opcode_encode_fn Opcode_umul_aa_ll_encode_fns[] = {
10500 static xtensa_opcode_encode_fn Opcode_umul_aa_hl_encode_fns[] = {
10504 static xtensa_opcode_encode_fn Opcode_umul_aa_lh_encode_fns[] = {
10508 static xtensa_opcode_encode_fn Opcode_umul_aa_hh_encode_fns[] = {
10512 static xtensa_opcode_encode_fn Opcode_mul_ad_ll_encode_fns[] = {
10516 static xtensa_opcode_encode_fn Opcode_mul_ad_hl_encode_fns[] = {
10520 static xtensa_opcode_encode_fn Opcode_mul_ad_lh_encode_fns[] = {
10524 static xtensa_opcode_encode_fn Opcode_mul_ad_hh_encode_fns[] = {
10528 static xtensa_opcode_encode_fn Opcode_mul_da_ll_encode_fns[] = {
10532 static xtensa_opcode_encode_fn Opcode_mul_da_hl_encode_fns[] = {
10536 static xtensa_opcode_encode_fn Opcode_mul_da_lh_encode_fns[] = {
10540 static xtensa_opcode_encode_fn Opcode_mul_da_hh_encode_fns[] = {
10544 static xtensa_opcode_encode_fn Opcode_mul_dd_ll_encode_fns[] = {
10548 static xtensa_opcode_encode_fn Opcode_mul_dd_hl_encode_fns[] = {
10552 static xtensa_opcode_encode_fn Opcode_mul_dd_lh_encode_fns[] = {
10556 static xtensa_opcode_encode_fn Opcode_mul_dd_hh_encode_fns[] = {
10560 static xtensa_opcode_encode_fn Opcode_mula_aa_ll_encode_fns[] = {
10564 static xtensa_opcode_encode_fn Opcode_mula_aa_hl_encode_fns[] = {
10568 static xtensa_opcode_encode_fn Opcode_mula_aa_lh_encode_fns[] = {
10572 static xtensa_opcode_encode_fn Opcode_mula_aa_hh_encode_fns[] = {
10576 static xtensa_opcode_encode_fn Opcode_muls_aa_ll_encode_fns[] = {
10580 static xtensa_opcode_encode_fn Opcode_muls_aa_hl_encode_fns[] = {
10584 static xtensa_opcode_encode_fn Opcode_muls_aa_lh_encode_fns[] = {
10588 static xtensa_opcode_encode_fn Opcode_muls_aa_hh_encode_fns[] = {
10592 static xtensa_opcode_encode_fn Opcode_mula_ad_ll_encode_fns[] = {
10596 static xtensa_opcode_encode_fn Opcode_mula_ad_hl_encode_fns[] = {
10600 static xtensa_opcode_encode_fn Opcode_mula_ad_lh_encode_fns[] = {
10604 static xtensa_opcode_encode_fn Opcode_mula_ad_hh_encode_fns[] = {
10608 static xtensa_opcode_encode_fn Opcode_muls_ad_ll_encode_fns[] = {
10612 static xtensa_opcode_encode_fn Opcode_muls_ad_hl_encode_fns[] = {
10616 static xtensa_opcode_encode_fn Opcode_muls_ad_lh_encode_fns[] = {
10620 static xtensa_opcode_encode_fn Opcode_muls_ad_hh_encode_fns[] = {
10624 static xtensa_opcode_encode_fn Opcode_mula_da_ll_encode_fns[] = {
10628 static xtensa_opcode_encode_fn Opcode_mula_da_hl_encode_fns[] = {
10632 static xtensa_opcode_encode_fn Opcode_mula_da_lh_encode_fns[] = {
10636 static xtensa_opcode_encode_fn Opcode_mula_da_hh_encode_fns[] = {
10640 static xtensa_opcode_encode_fn Opcode_muls_da_ll_encode_fns[] = {
10644 static xtensa_opcode_encode_fn Opcode_muls_da_hl_encode_fns[] = {
10648 static xtensa_opcode_encode_fn Opcode_muls_da_lh_encode_fns[] = {
10652 static xtensa_opcode_encode_fn Opcode_muls_da_hh_encode_fns[] = {
10656 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_encode_fns[] = {
10660 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_encode_fns[] = {
10664 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_encode_fns[] = {
10668 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_encode_fns[] = {
10672 static xtensa_opcode_encode_fn Opcode_muls_dd_ll_encode_fns[] = {
10676 static xtensa_opcode_encode_fn Opcode_muls_dd_hl_encode_fns[] = {
10680 static xtensa_opcode_encode_fn Opcode_muls_dd_lh_encode_fns[] = {
10684 static xtensa_opcode_encode_fn Opcode_muls_dd_hh_encode_fns[] = {
10688 static xtensa_opcode_encode_fn Opcode_mula_da_ll_lddec_encode_fns[] = {
10692 static xtensa_opcode_encode_fn Opcode_mula_da_ll_ldinc_encode_fns[] = {
10696 static xtensa_opcode_encode_fn Opcode_mula_da_hl_lddec_encode_fns[] = {
10700 static xtensa_opcode_encode_fn Opcode_mula_da_hl_ldinc_encode_fns[] = {
10704 static xtensa_opcode_encode_fn Opcode_mula_da_lh_lddec_encode_fns[] = {
10708 static xtensa_opcode_encode_fn Opcode_mula_da_lh_ldinc_encode_fns[] = {
10712 static xtensa_opcode_encode_fn Opcode_mula_da_hh_lddec_encode_fns[] = {
10716 static xtensa_opcode_encode_fn Opcode_mula_da_hh_ldinc_encode_fns[] = {
10720 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_lddec_encode_fns[] = {
10724 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_ldinc_encode_fns[] = {
10728 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_lddec_encode_fns[] = {
10732 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_ldinc_encode_fns[] = {
10736 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_lddec_encode_fns[] = {
10740 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_ldinc_encode_fns[] = {
10744 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_lddec_encode_fns[] = {
10748 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_ldinc_encode_fns[] = {
10752 static xtensa_opcode_encode_fn Opcode_lddec_encode_fns[] = {
10756 static xtensa_opcode_encode_fn Opcode_ldinc_encode_fns[] = {
10760 static xtensa_opcode_encode_fn Opcode_rsr_m0_encode_fns[] = {
10764 static xtensa_opcode_encode_fn Opcode_wsr_m0_encode_fns[] = {
10768 static xtensa_opcode_encode_fn Opcode_xsr_m0_encode_fns[] = {
10772 static xtensa_opcode_encode_fn Opcode_rsr_m1_encode_fns[] = {
10776 static xtensa_opcode_encode_fn Opcode_wsr_m1_encode_fns[] = {
10780 static xtensa_opcode_encode_fn Opcode_xsr_m1_encode_fns[] = {
10784 static xtensa_opcode_encode_fn Opcode_rsr_m2_encode_fns[] = {
10788 static xtensa_opcode_encode_fn Opcode_wsr_m2_encode_fns[] = {
10792 static xtensa_opcode_encode_fn Opcode_xsr_m2_encode_fns[] = {
10796 static xtensa_opcode_encode_fn Opcode_rsr_m3_encode_fns[] = {
10800 static xtensa_opcode_encode_fn Opcode_wsr_m3_encode_fns[] = {
10804 static xtensa_opcode_encode_fn Opcode_xsr_m3_encode_fns[] = {
10808 static xtensa_opcode_encode_fn Opcode_rsr_acclo_encode_fns[] = {
10812 static xtensa_opcode_encode_fn Opcode_wsr_acclo_encode_fns[] = {
10816 static xtensa_opcode_encode_fn Opcode_xsr_acclo_encode_fns[] = {
10820 static xtensa_opcode_encode_fn Opcode_rsr_acchi_encode_fns[] = {
10824 static xtensa_opcode_encode_fn Opcode_wsr_acchi_encode_fns[] = {
10828 static xtensa_opcode_encode_fn Opcode_xsr_acchi_encode_fns[] = {
10832 static xtensa_opcode_encode_fn Opcode_rfi_encode_fns[] = {
10836 static xtensa_opcode_encode_fn Opcode_waiti_encode_fns[] = {
10840 static xtensa_opcode_encode_fn Opcode_rsr_interrupt_encode_fns[] = {
10844 static xtensa_opcode_encode_fn Opcode_wsr_intset_encode_fns[] = {
10848 static xtensa_opcode_encode_fn Opcode_wsr_intclear_encode_fns[] = {
10852 static xtensa_opcode_encode_fn Opcode_rsr_intenable_encode_fns[] = {
10856 static xtensa_opcode_encode_fn Opcode_wsr_intenable_encode_fns[] = {
10860 static xtensa_opcode_encode_fn Opcode_xsr_intenable_encode_fns[] = {
10864 static xtensa_opcode_encode_fn Opcode_break_encode_fns[] = {
10868 static xtensa_opcode_encode_fn Opcode_break_n_encode_fns[] = {
10872 static xtensa_opcode_encode_fn Opcode_rsr_dbreaka0_encode_fns[] = {
10876 static xtensa_opcode_encode_fn Opcode_wsr_dbreaka0_encode_fns[] = {
10880 static xtensa_opcode_encode_fn Opcode_xsr_dbreaka0_encode_fns[] = {
10884 static xtensa_opcode_encode_fn Opcode_rsr_dbreakc0_encode_fns[] = {
10888 static xtensa_opcode_encode_fn Opcode_wsr_dbreakc0_encode_fns[] = {
10892 static xtensa_opcode_encode_fn Opcode_xsr_dbreakc0_encode_fns[] = {
10896 static xtensa_opcode_encode_fn Opcode_rsr_dbreaka1_encode_fns[] = {
10900 static xtensa_opcode_encode_fn Opcode_wsr_dbreaka1_encode_fns[] = {
10904 static xtensa_opcode_encode_fn Opcode_xsr_dbreaka1_encode_fns[] = {
10908 static xtensa_opcode_encode_fn Opcode_rsr_dbreakc1_encode_fns[] = {
10912 static xtensa_opcode_encode_fn Opcode_wsr_dbreakc1_encode_fns[] = {
10916 static xtensa_opcode_encode_fn Opcode_xsr_dbreakc1_encode_fns[] = {
10920 static xtensa_opcode_encode_fn Opcode_rsr_ibreaka0_encode_fns[] = {
10924 static xtensa_opcode_encode_fn Opcode_wsr_ibreaka0_encode_fns[] = {
10928 static xtensa_opcode_encode_fn Opcode_xsr_ibreaka0_encode_fns[] = {
10932 static xtensa_opcode_encode_fn Opcode_rsr_ibreaka1_encode_fns[] = {
10936 static xtensa_opcode_encode_fn Opcode_wsr_ibreaka1_encode_fns[] = {
10940 static xtensa_opcode_encode_fn Opcode_xsr_ibreaka1_encode_fns[] = {
10944 static xtensa_opcode_encode_fn Opcode_rsr_ibreakenable_encode_fns[] = {
10948 static xtensa_opcode_encode_fn Opcode_wsr_ibreakenable_encode_fns[] = {
10952 static xtensa_opcode_encode_fn Opcode_xsr_ibreakenable_encode_fns[] = {
10956 static xtensa_opcode_encode_fn Opcode_rsr_debugcause_encode_fns[] = {
10960 static xtensa_opcode_encode_fn Opcode_wsr_debugcause_encode_fns[] = {
10964 static xtensa_opcode_encode_fn Opcode_xsr_debugcause_encode_fns[] = {
10968 static xtensa_opcode_encode_fn Opcode_rsr_icount_encode_fns[] = {
10972 static xtensa_opcode_encode_fn Opcode_wsr_icount_encode_fns[] = {
10976 static xtensa_opcode_encode_fn Opcode_xsr_icount_encode_fns[] = {
10980 static xtensa_opcode_encode_fn Opcode_rsr_icountlevel_encode_fns[] = {
10984 static xtensa_opcode_encode_fn Opcode_wsr_icountlevel_encode_fns[] = {
10988 static xtensa_opcode_encode_fn Opcode_xsr_icountlevel_encode_fns[] = {
10992 static xtensa_opcode_encode_fn Opcode_rsr_ddr_encode_fns[] = {
10996 static xtensa_opcode_encode_fn Opcode_wsr_ddr_encode_fns[] = {
11000 static xtensa_opcode_encode_fn Opcode_xsr_ddr_encode_fns[] = {
11004 static xtensa_opcode_encode_fn Opcode_rfdo_encode_fns[] = {
11008 static xtensa_opcode_encode_fn Opcode_rfdd_encode_fns[] = {
11012 static xtensa_opcode_encode_fn Opcode_wsr_mmid_encode_fns[] = {
11016 static xtensa_opcode_encode_fn Opcode_rsr_ccount_encode_fns[] = {
11020 static xtensa_opcode_encode_fn Opcode_wsr_ccount_encode_fns[] = {
11024 static xtensa_opcode_encode_fn Opcode_xsr_ccount_encode_fns[] = {
11028 static xtensa_opcode_encode_fn Opcode_rsr_ccompare0_encode_fns[] = {
11032 static xtensa_opcode_encode_fn Opcode_wsr_ccompare0_encode_fns[] = {
11036 static xtensa_opcode_encode_fn Opcode_xsr_ccompare0_encode_fns[] = {
11040 static xtensa_opcode_encode_fn Opcode_rsr_ccompare1_encode_fns[] = {
11044 static xtensa_opcode_encode_fn Opcode_wsr_ccompare1_encode_fns[] = {
11048 static xtensa_opcode_encode_fn Opcode_xsr_ccompare1_encode_fns[] = {
11052 static xtensa_opcode_encode_fn Opcode_rsr_ccompare2_encode_fns[] = {
11056 static xtensa_opcode_encode_fn Opcode_wsr_ccompare2_encode_fns[] = {
11060 static xtensa_opcode_encode_fn Opcode_xsr_ccompare2_encode_fns[] = {
11064 static xtensa_opcode_encode_fn Opcode_ipf_encode_fns[] = {
11068 static xtensa_opcode_encode_fn Opcode_ihi_encode_fns[] = {
11072 static xtensa_opcode_encode_fn Opcode_ipfl_encode_fns[] = {
11076 static xtensa_opcode_encode_fn Opcode_ihu_encode_fns[] = {
11080 static xtensa_opcode_encode_fn Opcode_iiu_encode_fns[] = {
11084 static xtensa_opcode_encode_fn Opcode_iii_encode_fns[] = {
11088 static xtensa_opcode_encode_fn Opcode_lict_encode_fns[] = {
11092 static xtensa_opcode_encode_fn Opcode_licw_encode_fns[] = {
11096 static xtensa_opcode_encode_fn Opcode_sict_encode_fns[] = {
11100 static xtensa_opcode_encode_fn Opcode_sicw_encode_fns[] = {
11104 static xtensa_opcode_encode_fn Opcode_dhwb_encode_fns[] = {
11108 static xtensa_opcode_encode_fn Opcode_dhwbi_encode_fns[] = {
11112 static xtensa_opcode_encode_fn Opcode_diwb_encode_fns[] = {
11116 static xtensa_opcode_encode_fn Opcode_diwbi_encode_fns[] = {
11120 static xtensa_opcode_encode_fn Opcode_dhi_encode_fns[] = {
11124 static xtensa_opcode_encode_fn Opcode_dii_encode_fns[] = {
11128 static xtensa_opcode_encode_fn Opcode_dpfr_encode_fns[] = {
11132 static xtensa_opcode_encode_fn Opcode_dpfw_encode_fns[] = {
11136 static xtensa_opcode_encode_fn Opcode_dpfro_encode_fns[] = {
11140 static xtensa_opcode_encode_fn Opcode_dpfwo_encode_fns[] = {
11144 static xtensa_opcode_encode_fn Opcode_dpfl_encode_fns[] = {
11148 static xtensa_opcode_encode_fn Opcode_dhu_encode_fns[] = {
11152 static xtensa_opcode_encode_fn Opcode_diu_encode_fns[] = {
11156 static xtensa_opcode_encode_fn Opcode_sdct_encode_fns[] = {
11160 static xtensa_opcode_encode_fn Opcode_ldct_encode_fns[] = {
11164 static xtensa_opcode_encode_fn Opcode_wsr_ptevaddr_encode_fns[] = {
11168 static xtensa_opcode_encode_fn Opcode_rsr_ptevaddr_encode_fns[] = {
11172 static xtensa_opcode_encode_fn Opcode_xsr_ptevaddr_encode_fns[] = {
11176 static xtensa_opcode_encode_fn Opcode_rsr_rasid_encode_fns[] = {
11180 static xtensa_opcode_encode_fn Opcode_wsr_rasid_encode_fns[] = {
11184 static xtensa_opcode_encode_fn Opcode_xsr_rasid_encode_fns[] = {
11188 static xtensa_opcode_encode_fn Opcode_rsr_itlbcfg_encode_fns[] = {
11192 static xtensa_opcode_encode_fn Opcode_wsr_itlbcfg_encode_fns[] = {
11196 static xtensa_opcode_encode_fn Opcode_xsr_itlbcfg_encode_fns[] = {
11200 static xtensa_opcode_encode_fn Opcode_rsr_dtlbcfg_encode_fns[] = {
11204 static xtensa_opcode_encode_fn Opcode_wsr_dtlbcfg_encode_fns[] = {
11208 static xtensa_opcode_encode_fn Opcode_xsr_dtlbcfg_encode_fns[] = {
11212 static xtensa_opcode_encode_fn Opcode_idtlb_encode_fns[] = {
11216 static xtensa_opcode_encode_fn Opcode_pdtlb_encode_fns[] = {
11220 static xtensa_opcode_encode_fn Opcode_rdtlb0_encode_fns[] = {
11224 static xtensa_opcode_encode_fn Opcode_rdtlb1_encode_fns[] = {
11228 static xtensa_opcode_encode_fn Opcode_wdtlb_encode_fns[] = {
11232 static xtensa_opcode_encode_fn Opcode_iitlb_encode_fns[] = {
11236 static xtensa_opcode_encode_fn Opcode_pitlb_encode_fns[] = {
11240 static xtensa_opcode_encode_fn Opcode_ritlb0_encode_fns[] = {
11244 static xtensa_opcode_encode_fn Opcode_ritlb1_encode_fns[] = {
11248 static xtensa_opcode_encode_fn Opcode_witlb_encode_fns[] = {
11252 static xtensa_opcode_encode_fn Opcode_ldpte_encode_fns[] = {
11256 static xtensa_opcode_encode_fn Opcode_hwwitlba_encode_fns[] = {
11260 static xtensa_opcode_encode_fn Opcode_hwwdtlba_encode_fns[] = {
11264 static xtensa_opcode_encode_fn Opcode_rsr_cpenable_encode_fns[] = {
11268 static xtensa_opcode_encode_fn Opcode_wsr_cpenable_encode_fns[] = {
11272 static xtensa_opcode_encode_fn Opcode_xsr_cpenable_encode_fns[] = {
11276 static xtensa_opcode_encode_fn Opcode_clamps_encode_fns[] = {
11280 static xtensa_opcode_encode_fn Opcode_min_encode_fns[] = {
11284 static xtensa_opcode_encode_fn Opcode_max_encode_fns[] = {
11288 static xtensa_opcode_encode_fn Opcode_minu_encode_fns[] = {
11292 static xtensa_opcode_encode_fn Opcode_maxu_encode_fns[] = {
11296 static xtensa_opcode_encode_fn Opcode_nsa_encode_fns[] = {
11300 static xtensa_opcode_encode_fn Opcode_nsau_encode_fns[] = {
11304 static xtensa_opcode_encode_fn Opcode_sext_encode_fns[] = {
11308 static xtensa_opcode_encode_fn Opcode_l32ai_encode_fns[] = {
11312 static xtensa_opcode_encode_fn Opcode_s32ri_encode_fns[] = {
11316 static xtensa_opcode_encode_fn Opcode_s32c1i_encode_fns[] = {
11320 static xtensa_opcode_encode_fn Opcode_rsr_scompare1_encode_fns[] = {
11324 static xtensa_opcode_encode_fn Opcode_wsr_scompare1_encode_fns[] = {
11328 static xtensa_opcode_encode_fn Opcode_xsr_scompare1_encode_fns[] = {
11332 static xtensa_opcode_encode_fn Opcode_rsr_atomctl_encode_fns[] = {
11336 static xtensa_opcode_encode_fn Opcode_wsr_atomctl_encode_fns[] = {
11340 static xtensa_opcode_encode_fn Opcode_xsr_atomctl_encode_fns[] = {
11344 static xtensa_opcode_encode_fn Opcode_quou_encode_fns[] = {
11348 static xtensa_opcode_encode_fn Opcode_quos_encode_fns[] = {
11352 static xtensa_opcode_encode_fn Opcode_remu_encode_fns[] = {
11356 static xtensa_opcode_encode_fn Opcode_rems_encode_fns[] = {
11360 static xtensa_opcode_encode_fn Opcode_rer_encode_fns[] = {
11364 static xtensa_opcode_encode_fn Opcode_wer_encode_fns[] = {
11368 static xtensa_opcode_encode_fn Opcode_rur_expstate_encode_fns[] = {
11372 static xtensa_opcode_encode_fn Opcode_wur_expstate_encode_fns[] = {
11376 static xtensa_opcode_encode_fn Opcode_read_impwire_encode_fns[] = {
11380 static xtensa_opcode_encode_fn Opcode_setb_expstate_encode_fns[] = {
11384 static xtensa_opcode_encode_fn Opcode_clrb_expstate_encode_fns[] = {
11388 static xtensa_opcode_encode_fn Opcode_wrmsk_expstate_encode_fns[] = {
11395 static xtensa_opcode_internal opcodes[] = {
13212 static int
14627 static int
14678 static int
14698 static void
14705 static void
14712 static void
14719 static void
14726 static void
14733 static void
14740 static xtensa_get_field_fn
14800 static xtensa_set_field_fn
14860 static xtensa_get_field_fn
14920 static xtensa_set_field_fn
14980 static xtensa_get_field_fn
15040 static xtensa_set_field_fn
15100 static xtensa_slot_internal slots[] = {
15118 static void
15124 static void
15130 static void
15136 static int Format_x24_slots[] = { 0 };
15138 static int Format_x16a_slots[] = { 1 };
15140 static int Format_x16b_slots[] = { 2 };
15142 static xtensa_format_internal formats[] = {
15149 static int
15161 static int length_table[16] = {
15180 static int