213 static inline void gen_offset_ld(DisasContext *ctx, TCGv r1, TCGv r2,  in gen_offset_ld()  argument
217     tcg_gen_addi_tl(temp, r2, con);  in gen_offset_ld()
221 static inline void gen_offset_st(DisasContext *ctx, TCGv r1, TCGv r2,  in gen_offset_st()  argument
225     tcg_gen_addi_tl(temp, r2, con);  in gen_offset_st()
262 static void gen_st_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,  in gen_st_preincr()  argument
266     tcg_gen_addi_tl(temp, r2, off);  in gen_st_preincr()
268     tcg_gen_mov_tl(r2, temp);  in gen_st_preincr()
271 static void gen_ld_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,  in gen_ld_preincr()  argument
275     tcg_gen_addi_tl(temp, r2, off);  in gen_ld_preincr()
277     tcg_gen_mov_tl(r2, temp);  in gen_ld_preincr()
397 static inline void gen_add_d(TCGv ret, TCGv r1, TCGv r2)  in gen_add_d()  argument
402     tcg_gen_add_tl(result, r1, r2);  in gen_add_d()
405     tcg_gen_xor_tl(t0, r1, r2);  in gen_add_d()
419 gen_add64_d(TCGv_i64 ret, TCGv_i64 r1, TCGv_i64 r2)  in gen_add64_d()  argument
426     tcg_gen_add_i64(result, r1, r2);  in gen_add64_d()
429     tcg_gen_xor_i64(t0, r1, r2);  in gen_add64_d()
445 gen_addsub64_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_addsub64_h()  argument
454     (*op1)(temp, r1_low, r2);  in gen_addsub64_h()
457     tcg_gen_xor_tl(temp3, r1_low, r2);  in gen_addsub64_h()
491 static inline void gen_madd32_d(TCGv ret, TCGv r1, TCGv r2, TCGv r3)  in gen_madd32_d()  argument
498     tcg_gen_ext_i32_i64(t2, r2);  in gen_madd32_d()
522 static inline void gen_maddi32_d(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_maddi32_d()  argument
525     gen_madd32_d(ret, r1, r2, temp);  in gen_maddi32_d()
603 gen_madd_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_madd_h()  argument
612         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_madd_h()
615         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_madd_h()
618         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_madd_h()
621         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_madd_h()
630 gen_maddsu_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddsu_h()  argument
639         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsu_h()
642         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsu_h()
645         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsu_h()
648         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsu_h()
657 gen_maddsum_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddsum_h()  argument
666         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsum_h()
669         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsum_h()
672         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsum_h()
675         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsum_h()
689 static inline void gen_adds(TCGv ret, TCGv r1, TCGv r2);
692 gen_madds_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_madds_h()  argument
703         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_madds_h()
706         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_madds_h()
709         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_madds_h()
712         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_madds_h()
726 static inline void gen_subs(TCGv ret, TCGv r1, TCGv r2);
729 gen_maddsus_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddsus_h()  argument
740         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsus_h()
743         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsus_h()
746         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsus_h()
749         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsus_h()
764 gen_maddsums_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddsums_h()  argument
773         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsums_h()
776         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsums_h()
779         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsums_h()
782         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsums_h()
797 gen_maddm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddm_h()  argument
806         GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n);  in gen_maddm_h()
809         GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n);  in gen_maddm_h()
812         GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n);  in gen_maddm_h()
815         GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n);  in gen_maddm_h()
825 gen_maddms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_maddms_h()  argument
833         GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n);  in gen_maddms_h()
836         GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n);  in gen_maddms_h()
839         GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n);  in gen_maddms_h()
842         GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n);  in gen_maddms_h()
851 gen_maddr64_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, uint32_t n,  in gen_maddr64_h()  argument
858         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddr64_h()
861         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddr64_h()
864         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddr64_h()
867         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddr64_h()
874 gen_maddr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_maddr32_h()  argument
881     gen_maddr64_h(ret, temp, temp2, r2, r3, n, mode);  in gen_maddr32_h()
885 gen_maddsur32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_maddsur32_h()  argument
893         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32_h()
896         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32_h()
899         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32_h()
902         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32_h()
912 gen_maddr64s_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3,  in gen_maddr64s_h()  argument
919         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddr64s_h()
922         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddr64s_h()
925         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddr64s_h()
928         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddr64s_h()
935 gen_maddr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_maddr32s_h()  argument
942     gen_maddr64s_h(ret, temp, temp2, r2, r3, n, mode);  in gen_maddr32s_h()
946 gen_maddsur32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_maddsur32s_h()  argument
954         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32s_h()
957         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32s_h()
960         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32s_h()
963         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_maddsur32s_h()
972 gen_maddr_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n)  in gen_maddr_q()  argument
975     gen_helper_maddr_q(ret, tcg_env, r1, r2, r3, t_n);  in gen_maddr_q()
979 gen_maddrs_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n)  in gen_maddrs_q()  argument
982     gen_helper_maddr_q_ssov(ret, tcg_env, r1, r2, r3, t_n);  in gen_maddrs_q()
1201 static inline void gen_msub32_d(TCGv ret, TCGv r1, TCGv r2, TCGv r3)  in gen_msub32_d()  argument
1208     tcg_gen_ext_i32_i64(t2, r2);  in gen_msub32_d()
1233 static inline void gen_msubi32_d(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_msubi32_d()  argument
1236     gen_msub32_d(ret, r1, r2, temp);  in gen_msubi32_d()
1311 static inline void gen_addi_d(TCGv ret, TCGv r1, target_ulong r2)  in gen_addi_d()  argument
1313     TCGv temp = tcg_constant_i32(r2);  in gen_addi_d()
1318 static inline void gen_add_CC(TCGv ret, TCGv r1, TCGv r2)  in gen_add_CC()  argument
1325     tcg_gen_add2_i32(result, cpu_PSW_C, r1, t0, r2, t0);  in gen_add_CC()
1328     tcg_gen_xor_tl(t0, r1, r2);  in gen_add_CC()
1347 static inline void gen_addc_CC(TCGv ret, TCGv r1, TCGv r2)  in gen_addc_CC()  argument
1357     tcg_gen_add2_i32(result, cpu_PSW_C, result, cpu_PSW_C, r2, t0);  in gen_addc_CC()
1360     tcg_gen_xor_tl(t0, r1, r2);  in gen_addc_CC()
1379 static inline void gen_cond_add(TCGCond cond, TCGv r1, TCGv r2, TCGv r3,  in gen_cond_add()  argument
1392     tcg_gen_add_tl(result, r1, r2);  in gen_cond_add()
1395     tcg_gen_xor_tl(temp2, r1, r2);  in gen_cond_add()
1412 static inline void gen_condi_add(TCGCond cond, TCGv r1, int32_t r2,  in gen_condi_add()  argument
1415     TCGv temp = tcg_constant_i32(r2);  in gen_condi_add()
1419 static inline void gen_sub_d(TCGv ret, TCGv r1, TCGv r2)  in gen_sub_d()  argument
1424     tcg_gen_sub_tl(result, r1, r2);  in gen_sub_d()
1427     tcg_gen_xor_tl(temp, r1, r2);  in gen_sub_d()
1441 gen_sub64_d(TCGv_i64 ret, TCGv_i64 r1, TCGv_i64 r2)  in gen_sub64_d()  argument
1448     tcg_gen_sub_i64(result, r1, r2);  in gen_sub64_d()
1451     tcg_gen_xor_i64(t0, r1, r2);  in gen_sub64_d()
1466 static inline void gen_sub_CC(TCGv ret, TCGv r1, TCGv r2)  in gen_sub_CC()  argument
1471     tcg_gen_sub_tl(result, r1, r2);  in gen_sub_CC()
1473     tcg_gen_setcond_tl(TCG_COND_GEU, cpu_PSW_C, r1, r2);  in gen_sub_CC()
1476     tcg_gen_xor_tl(temp, r1, r2);  in gen_sub_CC()
1489 static inline void gen_subc_CC(TCGv ret, TCGv r1, TCGv r2)  in gen_subc_CC()  argument
1492     tcg_gen_not_tl(temp, r2);  in gen_subc_CC()
1496 static inline void gen_cond_sub(TCGCond cond, TCGv r1, TCGv r2, TCGv r3,  in gen_cond_sub()  argument
1509     tcg_gen_sub_tl(result, r1, r2);  in gen_cond_sub()
1512     tcg_gen_xor_tl(temp2, r1, r2);  in gen_cond_sub()
1530 gen_msub_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msub_h()  argument
1539         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msub_h()
1542         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msub_h()
1545         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msub_h()
1548         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msub_h()
1557 gen_msubs_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubs_h()  argument
1568         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubs_h()
1571         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubs_h()
1574         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubs_h()
1577         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubs_h()
1592 gen_msubm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubm_h()  argument
1601         GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n);  in gen_msubm_h()
1604         GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n);  in gen_msubm_h()
1607         GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n);  in gen_msubm_h()
1610         GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n);  in gen_msubm_h()
1620 gen_msubms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubms_h()  argument
1628         GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n);  in gen_msubms_h()
1631         GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n);  in gen_msubms_h()
1634         GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n);  in gen_msubms_h()
1637         GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n);  in gen_msubms_h()
1646 gen_msubr64_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, uint32_t n,  in gen_msubr64_h()  argument
1653         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubr64_h()
1656         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubr64_h()
1659         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubr64_h()
1662         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubr64_h()
1669 gen_msubr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_msubr32_h()  argument
1676     gen_msubr64_h(ret, temp, temp2, r2, r3, n, mode);  in gen_msubr32_h()
1680 gen_msubr64s_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3,  in gen_msubr64s_h()  argument
1687         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubr64s_h()
1690         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubr64s_h()
1693         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubr64s_h()
1696         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubr64s_h()
1703 gen_msubr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_msubr32s_h()  argument
1710     gen_msubr64s_h(ret, temp, temp2, r2, r3, n, mode);  in gen_msubr32s_h()
1714 gen_msubr_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n)  in gen_msubr_q()  argument
1717     gen_helper_msubr_q(ret, tcg_env, r1, r2, r3, temp);  in gen_msubr_q()
1721 gen_msubrs_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n)  in gen_msubrs_q()  argument
1724     gen_helper_msubr_q_ssov(ret, tcg_env, r1, r2, r3, temp);  in gen_msubrs_q()
1939 gen_msubad_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubad_h()  argument
1948         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubad_h()
1951         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubad_h()
1954         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubad_h()
1957         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubad_h()
1966 gen_msubadm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubadm_h()  argument
1975         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubadm_h()
1978         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubadm_h()
1981         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubadm_h()
1984         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubadm_h()
1999 gen_msubadr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_msubadr32_h()  argument
2007         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32_h()
2010         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32_h()
2013         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32_h()
2016         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32_h()
2025 gen_msubads_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubads_h()  argument
2036         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubads_h()
2039         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubads_h()
2042         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubads_h()
2045         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubads_h()
2060 gen_msubadms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2,  in gen_msubadms_h()  argument
2069         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubadms_h()
2072         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubadms_h()
2075         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubadms_h()
2078         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubadms_h()
2092 gen_msubadr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)  in gen_msubadr32s_h()  argument
2100         GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32s_h()
2103         GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32s_h()
2106         GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32s_h()
2109         GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n);  in gen_msubadr32s_h()
2132 static inline void gen_absdif(TCGv ret, TCGv r1, TCGv r2)  in gen_absdif()  argument
2137     tcg_gen_sub_tl(result, r1, r2);  in gen_absdif()
2138     tcg_gen_sub_tl(temp, r2, r1);  in gen_absdif()
2139     tcg_gen_movcond_tl(TCG_COND_GT, result, r1, r2, result, temp);  in gen_absdif()
2143     tcg_gen_xor_tl(temp, result, r2);  in gen_absdif()
2144     tcg_gen_movcond_tl(TCG_COND_GT, cpu_PSW_V, r1, r2, cpu_PSW_V, temp);  in gen_absdif()
2145     tcg_gen_xor_tl(temp, r1, r2);  in gen_absdif()
2170 static inline void gen_mul_i32s(TCGv ret, TCGv r1, TCGv r2)  in gen_mul_i32s()  argument
2175     tcg_gen_muls2_tl(low, high, r1, r2);  in gen_mul_i32s()
2196 static inline void gen_mul_i64s(TCGv ret_low, TCGv ret_high, TCGv r1, TCGv r2)  in gen_mul_i64s()  argument
2198     tcg_gen_muls2_tl(ret_low, ret_high, r1, r2);  in gen_mul_i64s()
2217 static inline void gen_mul_i64u(TCGv ret_low, TCGv ret_high, TCGv r1, TCGv r2)  in gen_mul_i64u()  argument
2219     tcg_gen_mulu2_tl(ret_low, ret_high, r1, r2);  in gen_mul_i64u()
2251 static inline void gen_maddsi_32(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_maddsi_32()  argument
2254     gen_helper_madd32_ssov(ret, tcg_env, r1, r2, temp);  in gen_maddsi_32()
2257 static inline void gen_maddsui_32(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_maddsui_32()  argument
2260     gen_helper_madd32_suov(ret, tcg_env, r1, r2, temp);  in gen_maddsui_32()
2404 static inline void gen_msubsi_32(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_msubsi_32()  argument
2407     gen_helper_msub32_ssov(ret, tcg_env, r1, r2, temp);  in gen_msubsi_32()
2410 static inline void gen_msubsui_32(TCGv ret, TCGv r1, TCGv r2, int32_t con)  in gen_msubsui_32()  argument
2413     gen_helper_msub32_suov(ret, tcg_env, r1, r2, temp);  in gen_msubsui_32()
2543 static void gen_shas(TCGv ret, TCGv r1, TCGv r2)  in gen_shas()  argument
2545     gen_helper_sha_ssov(ret, tcg_env, r1, r2);  in gen_shas()
2580 static void gen_sh_cond(int cond, TCGv ret, TCGv r1, TCGv r2)  in gen_sh_cond()  argument
2586     tcg_gen_setcond_tl(cond, temp2, r1, r2);  in gen_sh_cond()
2596 static inline void gen_adds(TCGv ret, TCGv r1, TCGv r2)  in gen_adds()  argument
2598     gen_helper_add_ssov(ret, tcg_env, r1, r2);  in gen_adds()
2613 static inline void gen_subs(TCGv ret, TCGv r1, TCGv r2)  in gen_subs()  argument
2615     gen_helper_sub_ssov(ret, tcg_env, r1, r2);  in gen_subs()
2618 static inline void gen_subsu(TCGv ret, TCGv r1, TCGv r2)  in gen_subsu()  argument
2620     gen_helper_sub_suov(ret, tcg_env, r1, r2);  in gen_subsu()
2623 static inline void gen_bit_2op(TCGv ret, TCGv r1, TCGv r2,  in gen_bit_2op()  argument
2633     tcg_gen_shri_tl(temp2, r2, pos2);  in gen_bit_2op()
2643 static inline void gen_bit_1op(TCGv ret, TCGv r1, TCGv r2,  in gen_bit_1op()  argument
2652     tcg_gen_shri_tl(temp2, r2, pos2);  in gen_bit_1op()
2660 static inline void gen_accumulating_cond(int cond, TCGv ret, TCGv r1, TCGv r2,  in gen_accumulating_cond()  argument
2666     tcg_gen_setcond_tl(cond, temp, r1, r2);  in gen_accumulating_cond()
2731 static inline void gen_insert(TCGv ret, TCGv r1, TCGv r2, TCGv width, TCGv pos)  in gen_insert()  argument
2742     tcg_gen_shl_tl(temp, r2, pos);  in gen_insert()
2765 gen_dvinit_b(DisasContext *ctx, TCGv rl, TCGv rh, TCGv r1, TCGv r2)  in gen_dvinit_b()  argument
2770         gen_helper_dvinit_b_13(ret, tcg_env, r1, r2);  in gen_dvinit_b()
2772         gen_helper_dvinit_b_131(ret, tcg_env, r1, r2);  in gen_dvinit_b()
2778 gen_dvinit_h(DisasContext *ctx, TCGv rl, TCGv rh, TCGv r1, TCGv r2)  in gen_dvinit_h()  argument
2783         gen_helper_dvinit_h_13(ret, tcg_env, r1, r2);  in gen_dvinit_h()
2785         gen_helper_dvinit_h_131(ret, tcg_env, r1, r2);  in gen_dvinit_h()
2849                                    TCGv r2, int16_t address)  in gen_branch_cond()  argument
2852     tcg_gen_brcond_tl(cond, r1, r2, jumpLabel);  in gen_branch_cond()
2861                                     int r2, int16_t address)  in gen_branch_condi()  argument
2863     TCGv temp = tcg_constant_i32(r2);  in gen_branch_condi()
2900                                int r2 , int32_t constant , int32_t offset)  in gen_compute_branch()  argument
3081             gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3084             gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3090             gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_a[r1], cpu_gpr_a[r2],  in gen_compute_branch()
3093             gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_a[r1], cpu_gpr_a[r2],  in gen_compute_branch()
3099             gen_branch_cond(ctx, TCG_COND_GE, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3102             gen_branch_cond(ctx, TCG_COND_GEU, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3108             gen_branch_cond(ctx, TCG_COND_LT, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3111             gen_branch_cond(ctx, TCG_COND_LTU, cpu_gpr_d[r1], cpu_gpr_d[r2],  in gen_compute_branch()
3117             gen_loop(ctx, r2, offset * 2);  in gen_compute_branch()
3129             tcg_gen_mov_tl(temp2, cpu_gpr_d[r2]);  in gen_compute_branch()
3136             tcg_gen_mov_tl(temp2, cpu_gpr_d[r2]);  in gen_compute_branch()
3238     int r1, r2;  in decode_srr_opc()  local
3242     r2 = MASK_OP_SRR_S2(ctx->opcode);  in decode_srr_opc()
3246         gen_add_d(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3249         gen_add_d(cpu_gpr_d[r1], cpu_gpr_d[15], cpu_gpr_d[r2]);  in decode_srr_opc()
3252         gen_add_d(cpu_gpr_d[15], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3255         tcg_gen_add_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], cpu_gpr_a[r2]);  in decode_srr_opc()
3258         gen_adds(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3261         tcg_gen_and_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3266                            cpu_gpr_d[r2], cpu_gpr_d[r1]);  in decode_srr_opc()
3271                            cpu_gpr_d[r2], cpu_gpr_d[r1]);  in decode_srr_opc()
3275                            cpu_gpr_d[r2]);  in decode_srr_opc()
3279                            cpu_gpr_d[r2]);  in decode_srr_opc()
3282         tcg_gen_mov_tl(cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3285         tcg_gen_mov_tl(cpu_gpr_a[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3288         tcg_gen_mov_tl(cpu_gpr_a[r1], cpu_gpr_a[r2]);  in decode_srr_opc()
3291         tcg_gen_mov_tl(cpu_gpr_d[r1], cpu_gpr_a[r2]);  in decode_srr_opc()
3294         gen_mul_i32s(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3297         tcg_gen_or_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3300         gen_sub_d(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3303         gen_sub_d(cpu_gpr_d[r1], cpu_gpr_d[15], cpu_gpr_d[r2]);  in decode_srr_opc()
3306         gen_sub_d(cpu_gpr_d[15], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3309         gen_subs(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3312         tcg_gen_xor_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_srr_opc()
3321     int r1, r2;  in decode_ssr_opc()  local
3324     r2 = MASK_OP_SSR_S2(ctx->opcode);  in decode_ssr_opc()
3328         tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL);  in decode_ssr_opc()
3331         tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL);  in decode_ssr_opc()
3332         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4);  in decode_ssr_opc()
3335         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB);  in decode_ssr_opc()
3338         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB);  in decode_ssr_opc()
3339         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1);  in decode_ssr_opc()
3342         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUW);  in decode_ssr_opc()
3345         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUW);  in decode_ssr_opc()
3346         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2);  in decode_ssr_opc()
3349         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL);  in decode_ssr_opc()
3352         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL);  in decode_ssr_opc()
3353         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4);  in decode_ssr_opc()
3405     int r1, r2;  in decode_slr_opc()  local
3408     r2 = MASK_OP_SLR_S2(ctx->opcode);  in decode_slr_opc()
3413         tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL);  in decode_slr_opc()
3416         tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL);  in decode_slr_opc()
3417         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4);  in decode_slr_opc()
3420         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB);  in decode_slr_opc()
3423         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB);  in decode_slr_opc()
3424         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1);  in decode_slr_opc()
3427         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW);  in decode_slr_opc()
3430         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW);  in decode_slr_opc()
3431         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2);  in decode_slr_opc()
3434         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL);  in decode_slr_opc()
3437         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL);  in decode_slr_opc()
3438         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4);  in decode_slr_opc()
3447     int r2;  in decode_sro_opc()  local
3450     r2 = MASK_OP_SRO_S2(ctx->opcode);  in decode_sro_opc()
3456         gen_offset_ld(ctx, cpu_gpr_a[15], cpu_gpr_a[r2], address * 4, MO_LESL);  in decode_sro_opc()
3459         gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);  in decode_sro_opc()
3462         gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);  in decode_sro_opc()
3465         gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);  in decode_sro_opc()
3468         gen_offset_st(ctx, cpu_gpr_a[15], cpu_gpr_a[r2], address * 4, MO_LESL);  in decode_sro_opc()
3471         gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);  in decode_sro_opc()
3474         gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);  in decode_sro_opc()
3477         gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);  in decode_sro_opc()
3553     int r1, r2;  in decode_16Bit_opc()  local
3620         r2 = MASK_OP_SRRS_S2(ctx->opcode);  in decode_16Bit_opc()
3625         tcg_gen_add_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], temp);  in decode_16Bit_opc()
3964     int r1, r2, r3;  in decode_bit_andacc()  local
3968     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_andacc()
3977         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_andacc()
3981         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_andacc()
3986             gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_andacc()
3989             gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_andacc()
3994         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_andacc()
4005     int r1, r2, r3;  in decode_bit_logical_t()  local
4008     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_logical_t()
4016         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t()
4020         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t()
4024         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t()
4028         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t()
4039     int r1, r2, r3;  in decode_bit_insert()  local
4044     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_insert()
4051     tcg_gen_shri_tl(temp, cpu_gpr_d[r2], pos2);  in decode_bit_insert()
4062     int r1, r2, r3;  in decode_bit_logical_t2()  local
4067     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_logical_t2()
4074         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t2()
4078         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t2()
4082         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t2()
4086         gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_logical_t2()
4098     int r1, r2, r3;  in decode_bit_orand()  local
4103     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_orand()
4110         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_orand()
4114         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_orand()
4119             gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_orand()
4122             gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_orand()
4127         gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_orand()
4138     int r1, r2, r3;  in decode_bit_sh_logic1()  local
4144     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_sh_logic1()
4153         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic1()
4157         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic1()
4161         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic1()
4165         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic1()
4178     int r1, r2, r3;  in decode_bit_sh_logic2()  local
4184     r2 = MASK_OP_BIT_S2(ctx->opcode);  in decode_bit_sh_logic2()
4193         gen_bit_1op(temp, cpu_gpr_d[r1] , cpu_gpr_d[r2] ,  in decode_bit_sh_logic2()
4197         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic2()
4201         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic2()
4205         gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_bit_sh_logic2()
4222     int32_t r1, r2;  in decode_bo_addrmode_post_pre_base()  local
4226     r2  = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_post_pre_base()
4241         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4248         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4259             tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4267             tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4273         gen_offset_st(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LESL);  in decode_bo_addrmode_post_pre_base()
4276         tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_post_pre_base()
4278         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4281         gen_st_preincr(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LESL);  in decode_bo_addrmode_post_pre_base()
4284         gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB);  in decode_bo_addrmode_post_pre_base()
4287         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_post_pre_base()
4289         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4292         gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB);  in decode_bo_addrmode_post_pre_base()
4296         gen_offset_st_2regs(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2],  in decode_bo_addrmode_post_pre_base()
4301         gen_st_2regs_64(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], ctx);  in decode_bo_addrmode_post_pre_base()
4302         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4307         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4309         tcg_gen_mov_tl(cpu_gpr_a[r2], temp);  in decode_bo_addrmode_post_pre_base()
4313         gen_offset_st_2regs(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2],  in decode_bo_addrmode_post_pre_base()
4318         gen_st_2regs_64(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], ctx);  in decode_bo_addrmode_post_pre_base()
4319         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4324         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4326         tcg_gen_mov_tl(cpu_gpr_a[r2], temp);  in decode_bo_addrmode_post_pre_base()
4329         gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_post_pre_base()
4332         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_post_pre_base()
4334         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4337         gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_post_pre_base()
4342         gen_offset_st(ctx, temp, cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_post_pre_base()
4347         tcg_gen_qemu_st_tl(temp, cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_post_pre_base()
4349         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4354         gen_st_preincr(ctx, temp, cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_post_pre_base()
4357         gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_post_pre_base()
4360         tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_post_pre_base()
4362         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_post_pre_base()
4365         gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_post_pre_base()
4376     int32_t r1, r2;  in decode_bo_addrmode_bitreverse_circular()  local
4380     r2  = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_bitreverse_circular()
4387     CHECK_REG_PAIR(r2);  in decode_bo_addrmode_bitreverse_circular()
4388     tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4389     tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_bitreverse_circular()
4395         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4400         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4404         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4408         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4412         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4416         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4421         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4426         tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16);  in decode_bo_addrmode_bitreverse_circular()
4429         tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_bitreverse_circular()
4431         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4436         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4441         tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16);  in decode_bo_addrmode_bitreverse_circular()
4444         tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_bitreverse_circular()
4446         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4450         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4454         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4459         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4464         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4468         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_bitreverse_circular()
4472         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_bitreverse_circular()
4483     int32_t r1, r2;  in decode_bo_addrmode_ld_post_pre_base()  local
4487     r2  = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_ld_post_pre_base()
4493         gen_offset_ld(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_ld_post_pre_base()
4496         tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4498         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4501         gen_ld_preincr(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_ld_post_pre_base()
4504         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_SB);  in decode_bo_addrmode_ld_post_pre_base()
4507         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4509         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4512         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_SB);  in decode_bo_addrmode_ld_post_pre_base()
4515         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB);  in decode_bo_addrmode_ld_post_pre_base()
4518         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4520         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4523         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB);  in decode_bo_addrmode_ld_post_pre_base()
4527         gen_offset_ld_2regs(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2],  in decode_bo_addrmode_ld_post_pre_base()
4532         gen_ld_2regs_64(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], ctx);  in decode_bo_addrmode_ld_post_pre_base()
4533         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4538         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4540         tcg_gen_mov_tl(cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ld_post_pre_base()
4544         gen_offset_ld_2regs(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2],  in decode_bo_addrmode_ld_post_pre_base()
4549         gen_ld_2regs_64(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], ctx);  in decode_bo_addrmode_ld_post_pre_base()
4550         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4555         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4557         tcg_gen_mov_tl(cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ld_post_pre_base()
4560         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LESW);  in decode_bo_addrmode_ld_post_pre_base()
4563         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4565         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4568         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LESW);  in decode_bo_addrmode_ld_post_pre_base()
4571         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_ld_post_pre_base()
4574         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4576         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4579         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_ld_post_pre_base()
4582         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_ld_post_pre_base()
4586         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4589         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4592         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW);  in decode_bo_addrmode_ld_post_pre_base()
4596         gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_ld_post_pre_base()
4599         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx,  in decode_bo_addrmode_ld_post_pre_base()
4601         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_ld_post_pre_base()
4604         gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL);  in decode_bo_addrmode_ld_post_pre_base()
4615     int r1, r2;  in decode_bo_addrmode_ld_bitreverse_circular()  local
4619     r2 = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_ld_bitreverse_circular()
4626     CHECK_REG_PAIR(r2);  in decode_bo_addrmode_ld_bitreverse_circular()
4627     tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4628     tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ld_bitreverse_circular()
4634         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4638         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4642         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4646         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4650         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4654         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4659         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4664         tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16);  in decode_bo_addrmode_ld_bitreverse_circular()
4667         tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ld_bitreverse_circular()
4669         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4674         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4679         tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16);  in decode_bo_addrmode_ld_bitreverse_circular()
4682         tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ld_bitreverse_circular()
4684         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4688         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4692         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4696         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4700         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4705         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4710         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4714         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ld_bitreverse_circular()
4718         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ld_bitreverse_circular()
4729     int r1, r2;  in decode_bo_addrmode_stctx_post_pre_base()  local
4734     r2 = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_stctx_post_pre_base()
4743         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4747         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4751         gen_ldmst(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4752         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4755         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4756         gen_ldmst(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4759         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4763         tcg_gen_addi_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4766         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4770         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4774         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4778         gen_swap(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4779         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4782         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4783         gen_swap(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4786         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4790         gen_cmpswap(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4791         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4794         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4795         gen_cmpswap(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4798         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4802         gen_swapmsk(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4803         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4806         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);  in decode_bo_addrmode_stctx_post_pre_base()
4807         gen_swapmsk(ctx, r1, cpu_gpr_a[r2]);  in decode_bo_addrmode_stctx_post_pre_base()
4818     int r1, r2;  in decode_bo_addrmode_ldmst_bitreverse_circular()  local
4822     r2 = MASK_OP_BO_S2(ctx->opcode);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4829     CHECK_REG_PAIR(r2);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4830     tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4831     tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4836         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4840         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4844         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4848         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4852         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4856         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4860         gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4864         gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10);  in decode_bo_addrmode_ldmst_bitreverse_circular()
4873     int r1, r2;  in decode_bol_opc()  local
4878     r2 = MASK_OP_BOL_S2(ctx->opcode);  in decode_bol_opc()
4884         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address);  in decode_bol_opc()
4889         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address);  in decode_bol_opc()
4893         tcg_gen_addi_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], address);  in decode_bol_opc()
4897             gen_offset_st(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], address, MO_LEUL);  in decode_bol_opc()
4903         gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LEUL);  in decode_bol_opc()
4907             gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_SB);  in decode_bol_opc()
4914             gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_UB);  in decode_bol_opc()
4921             gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LESW);  in decode_bol_opc()
4928             gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LEUW);  in decode_bol_opc()
4935             gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_SB);  in decode_bol_opc()
4942             gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LESW);  in decode_bol_opc()
4956     int r1, r2;  in decode_rc_logical_shift()  local
4960     r2 = MASK_OP_RC_D(ctx->opcode);  in decode_rc_logical_shift()
4967         tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
4970         tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9);  in decode_rc_logical_shift()
4975         tcg_gen_nand_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp);  in decode_rc_logical_shift()
4980         tcg_gen_nor_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp);  in decode_rc_logical_shift()
4983         tcg_gen_ori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
4986         tcg_gen_ori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9);  in decode_rc_logical_shift()
4990         gen_shi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
4994         gen_sh_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
4998         gen_shaci(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
5002         gen_sha_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
5005         gen_shasi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
5008         tcg_gen_xori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
5009         tcg_gen_not_tl(cpu_gpr_d[r2], cpu_gpr_d[r2]);  in decode_rc_logical_shift()
5012         tcg_gen_xori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_logical_shift()
5017             gen_helper_shuffle(cpu_gpr_d[r2], cpu_gpr_d[r1], temp);  in decode_rc_logical_shift()
5030     int r1, r2;  in decode_rc_accumulator()  local
5035     r2 = MASK_OP_RC_D(ctx->opcode);  in decode_rc_accumulator()
5045         gen_absdifi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5048         gen_absdifsi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5051         gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5054         gen_addci_CC(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5057         gen_addsi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5060         gen_addsui(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5063         gen_addi_CC(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5066         gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5070         gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5075         gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5079         gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5084         gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5088         gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5092         tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5095         gen_eqany_bi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5098         gen_eqany_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5101         tcg_gen_setcondi_tl(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5105         tcg_gen_setcondi_tl(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5108         tcg_gen_setcondi_tl(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5112         tcg_gen_setcondi_tl(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5116         tcg_gen_movcond_tl(TCG_COND_GT, cpu_gpr_d[r2], cpu_gpr_d[r1], temp,  in decode_rc_accumulator()
5121         tcg_gen_movcond_tl(TCG_COND_GTU, cpu_gpr_d[r2], cpu_gpr_d[r1], temp,  in decode_rc_accumulator()
5126         tcg_gen_movcond_tl(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], temp,  in decode_rc_accumulator()
5131         tcg_gen_movcond_tl(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], temp,  in decode_rc_accumulator()
5135         tcg_gen_setcondi_tl(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5138         gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5142         gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5147         gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5151         gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5156         gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5160         gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5165         gen_sub_d(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]);  in decode_rc_accumulator()
5169         gen_subs(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]);  in decode_rc_accumulator()
5173         gen_subsu(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]);  in decode_rc_accumulator()
5176         gen_sh_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5179         gen_sh_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5183         gen_sh_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5186         gen_sh_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5190         gen_sh_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5193         gen_sh_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_accumulator()
5196         gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5200         gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5205         gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5209         gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5214         gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5218         gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_rc_accumulator()
5253     int r1, r2;  in decode_rc_mul()  local
5256     r2 = MASK_OP_RC_D(ctx->opcode);  in decode_rc_mul()
5264         gen_muli_i32s(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_mul()
5267         CHECK_REG_PAIR(r2);  in decode_rc_mul()
5268         gen_muli_i64s(cpu_gpr_d[r2], cpu_gpr_d[r2+1], cpu_gpr_d[r1], const9);  in decode_rc_mul()
5271         gen_mulsi_i32(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_mul()
5275         CHECK_REG_PAIR(r2);  in decode_rc_mul()
5276         gen_muli_i64u(cpu_gpr_d[r2], cpu_gpr_d[r2+1], cpu_gpr_d[r1], const9);  in decode_rc_mul()
5280         gen_mulsui_i32(cpu_gpr_d[r2], cpu_gpr_d[r1], const9);  in decode_rc_mul()
5291     int r1, r2;  in decode_rcpw_insert()  local
5298     r2     = MASK_OP_RCPW_D(ctx->opcode);  in decode_rcpw_insert()
5305         CHECK_REG_PAIR(r2);  in decode_rcpw_insert()
5308             tcg_gen_movi_tl(cpu_gpr_d[r2+1], ((1u << width) - 1) << pos);  in decode_rcpw_insert()
5309             tcg_gen_movi_tl(cpu_gpr_d[r2], (const4 << pos));  in decode_rcpw_insert()
5315             tcg_gen_mov_tl(cpu_gpr_d[r2], cpu_gpr_d[r1]);  in decode_rcpw_insert()
5319             tcg_gen_deposit_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, pos, width);  in decode_rcpw_insert()
5527     int r1, r2;  in decode_rlc_opc()  local
5531     r2      = MASK_OP_RLC_D(ctx->opcode);  in decode_rlc_opc()
5535         gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16);  in decode_rlc_opc()
5538         gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16 << 16);  in decode_rlc_opc()
5541         tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r1], const16 << 16);  in decode_rlc_opc()
5545         gen_mfcr(ctx, cpu_gpr_d[r2], const16);  in decode_rlc_opc()
5548         tcg_gen_movi_tl(cpu_gpr_d[r2], const16);  in decode_rlc_opc()
5552             CHECK_REG_PAIR(r2);  in decode_rlc_opc()
5553             tcg_gen_movi_tl(cpu_gpr_d[r2], const16);  in decode_rlc_opc()
5554             tcg_gen_movi_tl(cpu_gpr_d[r2+1], const16 >> 15);  in decode_rlc_opc()
5561         tcg_gen_movi_tl(cpu_gpr_d[r2], const16);  in decode_rlc_opc()
5564         tcg_gen_movi_tl(cpu_gpr_d[r2], const16 << 16);  in decode_rlc_opc()
5567         tcg_gen_movi_tl(cpu_gpr_a[r2], const16 << 16);  in decode_rlc_opc()
5582     int r3, r2, r1;  in decode_rr_accumulator()  local
5587     r2 = MASK_OP_RR_S2(ctx->opcode);  in decode_rr_accumulator()
5593         gen_abs(cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5596         gen_helper_abs_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]);  in decode_rr_accumulator()
5599         gen_helper_abs_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]);  in decode_rr_accumulator()
5602         gen_absdif(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5606                             cpu_gpr_d[r2]);  in decode_rr_accumulator()
5610                             cpu_gpr_d[r2]);  in decode_rr_accumulator()
5614                                cpu_gpr_d[r2]);  in decode_rr_accumulator()
5618                                  cpu_gpr_d[r2]);  in decode_rr_accumulator()
5621         gen_helper_abs_ssov(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]);  in decode_rr_accumulator()
5624         gen_helper_abs_h_ssov(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]);  in decode_rr_accumulator()
5627         gen_add_d(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5630         gen_helper_add_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5633         gen_helper_add_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5636         gen_addc_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5639         gen_adds(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5643                               cpu_gpr_d[r2]);  in decode_rr_accumulator()
5647                               cpu_gpr_d[r2]);  in decode_rr_accumulator()
5651                             cpu_gpr_d[r2]);  in decode_rr_accumulator()
5654         gen_add_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5658                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5662                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5666                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5670                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5674                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5678                               cpu_gpr_d[r2], &tcg_gen_and_tl);  in decode_rr_accumulator()
5682                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5685         gen_helper_eq_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5688         gen_helper_eq_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5692                               cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5695         gen_helper_eqany_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5698         gen_helper_eqany_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5702                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5706                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5710                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5714                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5717         gen_helper_lt_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5720         gen_helper_lt_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5723         gen_helper_lt_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5726         gen_helper_lt_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5730                               cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5734                               cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5738                            cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5742                            cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5745         gen_helper_max_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5748         gen_helper_max_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5751         gen_helper_max_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5754         gen_helper_max_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5758                            cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5762                            cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5765         gen_helper_min_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5768         gen_helper_min_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5771         gen_helper_min_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5774         gen_helper_min_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5777         tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5785             tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5794             tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5795             tcg_gen_sari_tl(cpu_gpr_d[r3 + 1], cpu_gpr_d[r2], 31);  in decode_rr_accumulator()
5802                            cpu_gpr_d[r2]);  in decode_rr_accumulator()
5806                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5810                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5814                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5818                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5822                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5826                               cpu_gpr_d[r2], &tcg_gen_or_tl);  in decode_rr_accumulator()
5842                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5846                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5850                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5854                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5858                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5862                     cpu_gpr_d[r2]);  in decode_rr_accumulator()
5865         gen_sub_d(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5868         gen_helper_sub_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5871         gen_helper_sub_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5874         gen_subc_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5877         gen_subs(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5880         gen_subsu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5884                               cpu_gpr_d[r2]);  in decode_rr_accumulator()
5888                               cpu_gpr_d[r2]);  in decode_rr_accumulator()
5891         gen_sub_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_accumulator()
5895                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5899                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5903                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5907                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5911                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5915                               cpu_gpr_d[r2], &tcg_gen_xor_tl);  in decode_rr_accumulator()
5925     int r3, r2, r1;  in decode_rr_logical_shift()  local
5928     r2 = MASK_OP_RR_S2(ctx->opcode);  in decode_rr_logical_shift()
5934         tcg_gen_and_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5937         tcg_gen_andc_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5959         tcg_gen_nand_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5962         tcg_gen_nor_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5965         tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5968         tcg_gen_orc_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5971         gen_helper_sh(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5974         gen_helper_sh_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5977         gen_helper_sha(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5980         gen_helper_sha_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5983         gen_shas(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5986         tcg_gen_eqv_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5989         tcg_gen_xor_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_logical_shift()
5999     int r1, r2, r3;  in decode_rr_address()  local
6004     r2 = MASK_OP_RR_S2(ctx->opcode);  in decode_rr_address()
6010         tcg_gen_add_tl(cpu_gpr_a[r3], cpu_gpr_a[r1], cpu_gpr_a[r2]);  in decode_rr_address()
6015         tcg_gen_add_tl(cpu_gpr_a[r3], cpu_gpr_a[r2], temp);  in decode_rr_address()
6020         tcg_gen_add_tl(temp, cpu_gpr_a[r2], temp);  in decode_rr_address()
6025                            cpu_gpr_a[r2]);  in decode_rr_address()
6032                            cpu_gpr_a[r2]);  in decode_rr_address()
6036                            cpu_gpr_a[r2]);  in decode_rr_address()
6039         tcg_gen_mov_tl(cpu_gpr_a[r3], cpu_gpr_d[r2]);  in decode_rr_address()
6042         tcg_gen_mov_tl(cpu_gpr_a[r3], cpu_gpr_a[r2]);  in decode_rr_address()
6045         tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_a[r2]);  in decode_rr_address()
6049                            cpu_gpr_a[r2]);  in decode_rr_address()
6055         tcg_gen_sub_tl(cpu_gpr_a[r3], cpu_gpr_a[r1], cpu_gpr_a[r2]);  in decode_rr_address()
6096     int r1, r2, r3;  in decode_rr_divide()  local
6102     r2 = MASK_OP_RR_S2(ctx->opcode);  in decode_rr_divide()
6107         gen_helper_bmerge(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6116                      cpu_gpr_d[r2]);  in decode_rr_divide()
6129             tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]);  in decode_rr_divide()
6133             tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0);  in decode_rr_divide()
6145                      cpu_gpr_d[r2]);  in decode_rr_divide()
6158             tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]);  in decode_rr_divide()
6162             tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0);  in decode_rr_divide()
6177         tcg_gen_setcondi_tl(TCG_COND_EQ, temp, cpu_gpr_d[r2], 0xffffffff);  in decode_rr_divide()
6180         tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, cpu_gpr_d[r2], 0);  in decode_rr_divide()
6195         tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0);  in decode_rr_divide()
6215             gen_helper_crc32b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6222             gen_helper_crc32_be(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6229             gen_helper_crc32_le(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6246                           cpu_gpr_d[r2]);  in decode_rr_divide()
6255                           cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6261         gen_helper_fmul(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6264         gen_helper_fdiv(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6281         gen_helper_fcmp(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr_divide()
6321     int r1, r2, r3;  in decode_rr1_mul()  local
6326     r2 = MASK_OP_RR1_S2(ctx->opcode);  in decode_rr1_mul()
6335         GEN_HELPER_LL(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6342         GEN_HELPER_LU(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6349         GEN_HELPER_UL(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6356         GEN_HELPER_UU(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6363         GEN_HELPER_LL(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6373         GEN_HELPER_LU(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6383         GEN_HELPER_UL(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6393         GEN_HELPER_UU(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6401         GEN_HELPER_LL(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6405         GEN_HELPER_LU(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6409         GEN_HELPER_UL(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6413         GEN_HELPER_UU(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n);  in decode_rr1_mul()
6424     int r1, r2, r3;  in decode_rr1_mulq()  local
6430     r2 = MASK_OP_RR1_S2(ctx->opcode);  in decode_rr1_mulq()
6440         gen_mul_q(cpu_gpr_d[r3], temp, cpu_gpr_d[r1], cpu_gpr_d[r2], n, 32);  in decode_rr1_mulq()
6444         gen_mul_q(cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rr1_mulq()
6448         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rr1_mulq()
6453         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rr1_mulq()
6457         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rr1_mulq()
6462         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rr1_mulq()
6467         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rr1_mulq()
6472         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rr1_mulq()
6477         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rr1_mulq()
6482         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rr1_mulq()
6494     int r1, r2, r3;  in decode_rr2_mul()  local
6498     r2  = MASK_OP_RR2_S2(ctx->opcode);  in decode_rr2_mul()
6502         gen_mul_i32s(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rr2_mul()
6507                      cpu_gpr_d[r2]);  in decode_rr2_mul()
6511                             cpu_gpr_d[r2]);  in decode_rr2_mul()
6516                      cpu_gpr_d[r2]);  in decode_rr2_mul()
6520                             cpu_gpr_d[r2]);  in decode_rr2_mul()
6531     int r1, r2, r3;  in decode_rrpw_extract_insert()  local
6537     r2 = MASK_OP_RRPW_S2(ctx->opcode);  in decode_rrpw_extract_insert()
6563             tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], pos);  in decode_rrpw_extract_insert()
6573             tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrpw_extract_insert()
6586     int r1, r2, r3, r4;  in decode_rrr_cond_select()  local
6591     r2  = MASK_OP_RRR_S2(ctx->opcode);  in decode_rrr_cond_select()
6597         gen_cond_add(TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr_cond_select()
6601         gen_cond_add(TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4],  in decode_rrr_cond_select()
6605         gen_cond_sub(TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4],  in decode_rrr_cond_select()
6609         gen_cond_sub(TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4],  in decode_rrr_cond_select()
6615                            cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rrr_cond_select()
6620                            cpu_gpr_d[r1], cpu_gpr_d[r2]);  in decode_rrr_cond_select()
6631     int r1, r2, r3, r4;  in decode_rrr_divide()  local
6635     r2 = MASK_OP_RRR_S2(ctx->opcode);  in decode_rrr_divide()
6644                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6650                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6656                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6662                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6668                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6674                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6680                        cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr_divide()
6689             gen_helper_crcn(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr_divide()
6703                          cpu_gpr_d[r2], cpu_gpr_d[r3]);  in decode_rrr_divide()
6707                          cpu_gpr_d[r2], cpu_gpr_d[r3]);  in decode_rrr_divide()
6718     uint32_t r1, r2, r3, r4;  in decode_rrr2_madd()  local
6722     r2 = MASK_OP_RRR2_S2(ctx->opcode);  in decode_rrr2_madd()
6728                      cpu_gpr_d[r2]);  in decode_rrr2_madd()
6734                      cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6738                                cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6744                      cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6750                       cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6754                                cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6760                       cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_madd()
6770     uint32_t r1, r2, r3, r4;  in decode_rrr2_msub()  local
6774     r2 = MASK_OP_RRR2_S2(ctx->opcode);  in decode_rrr2_msub()
6781                       cpu_gpr_d[r2]);  in decode_rrr2_msub()
6787                      cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6791                                cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6797                      cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6803                       cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6807                                cpu_gpr_d[r3], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6813                       cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]);  in decode_rrr2_msub()
6824     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_madd()  local
6828     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_madd()
6838                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6844                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6850                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6856                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6862                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6868                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6874                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6880                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6886                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6892                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6898                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6904                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6910                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6916                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6922                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6928                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6932                       cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6936                       cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6940                       cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6944                       cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6948                        cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_madd()
6952                        cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_madd()
6956                        cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_madd()
6960                        cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_madd()
6970     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_maddq_h()  local
6975     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_maddq_h()
6986                      cpu_gpr_d[r2], n, 32);  in decode_rrr1_maddq_h()
6992                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddq_h()
6996         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7003         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7009         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7016         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7023         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7030         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7036         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7043         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7049                       cpu_gpr_d[r2], n, 32);  in decode_rrr1_maddq_h()
7055                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddq_h()
7059         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7066         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7072         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7079         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7086         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7093         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7099         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7106         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7113                       cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2);  in decode_rrr1_maddq_h()
7118                        cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2);  in decode_rrr1_maddq_h()
7122         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7127         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7132         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_maddq_h()
7137         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_maddq_h()
7148     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_maddsu_h()  local
7152     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_maddsu_h()
7162                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_maddsu_h()
7168                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_maddsu_h()
7174                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_maddsu_h()
7180                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_maddsu_h()
7186                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7193                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7200                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7207                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7214                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7221                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7228                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7235                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7242                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7249                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7256                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7263                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_maddsu_h()
7268                         cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_maddsu_h()
7272                         cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_maddsu_h()
7276                         cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_maddsu_h()
7280                         cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_maddsu_h()
7284                          cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_maddsu_h()
7288                          cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_maddsu_h()
7292                          cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_maddsu_h()
7296                          cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_maddsu_h()
7306     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_msub()  local
7310     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_msub()
7320                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7326                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7332                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7338                    cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7344                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7350                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7356                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7362                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7368                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7374                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7380                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7386                     cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7392                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7398                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7404                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7410                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7414                       cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7418                       cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7422                       cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7426                       cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7430                        cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msub()
7434                        cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msub()
7438                        cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msub()
7442                        cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msub()
7452     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_msubq_h()  local
7457     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_msubq_h()
7468                      cpu_gpr_d[r2], n, 32);  in decode_rrr1_msubq_h()
7474                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubq_h()
7478         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7485         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7491         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7498         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7505         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7512         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7518         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7525         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7531                       cpu_gpr_d[r2], n, 32);  in decode_rrr1_msubq_h()
7537                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubq_h()
7541         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7548         tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7554         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7561         tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7568         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7575         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7581         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7588         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7595                       cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2);  in decode_rrr1_msubq_h()
7600                        cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2);  in decode_rrr1_msubq_h()
7604         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7609         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7614         tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]);  in decode_rrr1_msubq_h()
7619         tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16);  in decode_rrr1_msubq_h()
7630     uint32_t r1, r2, r3, r4, n;  in decode_rrr1_msubad_h()  local
7634     r2 = MASK_OP_RRR1_S2(ctx->opcode);  in decode_rrr1_msubad_h()
7644                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msubad_h()
7650                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msubad_h()
7656                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msubad_h()
7662                      cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msubad_h()
7668                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7675                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7682                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7689                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7696                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7703                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7710                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7717                       cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7724                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7731                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7738                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7745                        cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2],  in decode_rrr1_msubad_h()
7750                         cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msubad_h()
7754                         cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msubad_h()
7758                         cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msubad_h()
7762                         cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msubad_h()
7766                          cpu_gpr_d[r2], n, MODE_LL);  in decode_rrr1_msubad_h()
7770                          cpu_gpr_d[r2], n, MODE_LU);  in decode_rrr1_msubad_h()
7774                          cpu_gpr_d[r2], n, MODE_UL);  in decode_rrr1_msubad_h()
7778                          cpu_gpr_d[r2], n, MODE_UU);  in decode_rrr1_msubad_h()
7789     int r1, r2, r3, r4;  in decode_rrrr_extract_insert()  local
7793     r2 = MASK_OP_RRRR_S2(ctx->opcode);  in decode_rrrr_extract_insert()
7804         if (r1 == r2) {  in decode_rrrr_extract_insert()
7811             tcg_gen_shr_tl(msw, cpu_gpr_d[r2], msw);  in decode_rrrr_extract_insert()
7840         gen_insert(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2], tmp_width,  in decode_rrrr_extract_insert()
7852     int r1, r2, r3, r4;  in decode_rrrw_extract_insert()  local
7859     r2  = MASK_OP_RRRW_S2(ctx->opcode);  in decode_rrrw_extract_insert()
7889         tcg_gen_shl_tl(cpu_gpr_d[r4], cpu_gpr_d[r2], temp);  in decode_rrrw_extract_insert()
7897         gen_insert(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2], temp, temp2);  in decode_rrrw_extract_insert()
8016     int32_t r1, r2, r3;  in decode_32Bit_opc()  local
8187         r2 = MASK_OP_BRR_S2(ctx->opcode);  in decode_32Bit_opc()
8189         gen_compute_branch(ctx, op1, r1, r2, 0, address);  in decode_32Bit_opc()
8211         r2 = MASK_OP_RCRR_S3(ctx->opcode);  in decode_32Bit_opc()
8218         CHECK_REG_PAIR(r2);  in decode_32Bit_opc()
8220         tcg_gen_andi_tl(temp2, cpu_gpr_d[r2 + 1], 0x1f);  in decode_32Bit_opc()
8221         tcg_gen_andi_tl(temp3, cpu_gpr_d[r2], 0x1f);  in decode_32Bit_opc()
8285         r2 = MASK_OP_RRPW_S2(ctx->opcode);  in decode_32Bit_opc()
8289         tcg_gen_extract2_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], cpu_gpr_d[r1],  in decode_32Bit_opc()