Lines Matching defs:t2

829     TCGv t1, t2, shift;
832     t2 = tcg_temp_new();
844     tcg_gen_shr_tl(t2, s2, shift);
845     tcg_gen_shri_tl(t2, t2, 1);
847     tcg_gen_or_tl(dst, t1, t2);
892     TCGv_i32 t2 = tcg_temp_new_i32();
899     tcg_gen_sextract_i32(t2, src2, 16, 16);
900     tcg_gen_mul_i32(t1, t1, t2);
909     TCGv_i32 t2 = tcg_temp_new_i32();
924     tcg_gen_sextract_i32(t2, src2, 16, 16);
925     tcg_gen_mul_i32(t1, t1, t2);
2801             TCGv_i32 t2 = tcg_temp_new_i32();
2802             tcg_gen_trunc_tl_i32(t2, gen_load_gpr(dc, rs2_or_imm));
2803             tcg_gen_add_i32(trap, trap, t2);
3820     TCGv_i64 t1, t2;
3836         t2 = tcg_constant_i64((uint32_t)a->rs2_or_imm);
3850         t2 = tcg_temp_new_i64();
3852         tcg_gen_ext32u_i64(t2, cpu_regs[a->rs2_or_imm]);
3854         tcg_gen_extu_i32_i64(t2, cpu_regs[a->rs2_or_imm]);
3861     tcg_gen_divu_i64(t1, t1, t2);
3935         TCGv t1, t2;
3949         t2 = tcg_temp_new();
3951         tcg_gen_setcondi_tl(TCG_COND_EQ, t2, src2, -1);
3952         tcg_gen_and_tl(t1, t1, t2);