535     if (env->dmmu.sfsr & SFSR_VALID_BIT) { /* Fault status register */  in build_sfsr()
562         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_data()
568         context = env->dmmu.mmu_secondary_context & 0x1fff;  in get_physical_address_data()
625             env->dmmu.sfsr = sfsr;  in get_physical_address_data()
626             env->dmmu.sfar = address; /* Fault address register */  in get_physical_address_data()
627             env->dmmu.tag_access = (address & ~0x1fffULL) | context;  in get_physical_address_data()
639     env->dmmu.tag_access = (address & ~0x1fffULL) | context;  in get_physical_address_data()
661         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_code()
670         context = env->dmmu.mmu_primary_context & 0x1fff;  in get_physical_address_code()
732                                                 env->dmmu.mmu_primary_context,  in get_physical_address()
733                                                 env->dmmu.mmu_secondary_context,  in get_physical_address()
737                                                 env->dmmu.mmu_primary_context,  in get_physical_address()
738                                                 env->dmmu.mmu_secondary_context,  in get_physical_address()
770                                    env->dmmu.mmu_primary_context,  in sparc_cpu_tlb_fill()
771                                    env->dmmu.mmu_secondary_context);  in sparc_cpu_tlb_fill()
788                 env->dmmu.mmu_primary_context,  in dump_mmu()
789                 env->dmmu.mmu_secondary_context);  in dump_mmu()
791                 "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target);  in dump_mmu()
919     env->dmmu.sfsr = build_sfsr(env, mmu_idx, access_type);  in sparc_cpu_do_unaligned_access()
920     env->dmmu.sfar = addr;  in sparc_cpu_do_unaligned_access()