Lines Matching refs:REG
353 #define REG(x) cpu_gregs[(x) ^ ctx->gbank] macro
495 tcg_gen_addi_i32(addr, REG(B11_8), B3_0 * 4); in _decode_opc()
496 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
503 tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4); in _decode_opc()
504 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, in _decode_opc()
522 tcg_gen_movi_i32(REG(B11_8), B7_0s); in _decode_opc()
528 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, in _decode_opc()
536 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, in _decode_opc()
541 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), B7_0s); in _decode_opc()
558 tcg_gen_mov_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
561 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_UB); in _decode_opc()
564 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, in _decode_opc()
568 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, in _decode_opc()
572 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB); in _decode_opc()
575 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
579 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
585 tcg_gen_subi_i32(addr, REG(B11_8), 1); in _decode_opc()
587 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_UB); in _decode_opc()
588 tcg_gen_mov_i32(REG(B11_8), addr); /* modify register status */ in _decode_opc()
594 tcg_gen_subi_i32(addr, REG(B11_8), 2); in _decode_opc()
595 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
597 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
603 tcg_gen_subi_i32(addr, REG(B11_8), 4); in _decode_opc()
604 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
606 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
610 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB); in _decode_opc()
612 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 1); in _decode_opc()
615 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
618 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2); in _decode_opc()
621 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
624 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4); in _decode_opc()
629 tcg_gen_add_i32(addr, REG(B11_8), REG(0)); in _decode_opc()
630 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_UB); in _decode_opc()
636 tcg_gen_add_i32(addr, REG(B11_8), REG(0)); in _decode_opc()
637 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
644 tcg_gen_add_i32(addr, REG(B11_8), REG(0)); in _decode_opc()
645 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
652 tcg_gen_add_i32(addr, REG(B7_4), REG(0)); in _decode_opc()
653 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_SB); in _decode_opc()
659 tcg_gen_add_i32(addr, REG(B7_4), REG(0)); in _decode_opc()
660 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, in _decode_opc()
667 tcg_gen_add_i32(addr, REG(B7_4), REG(0)); in _decode_opc()
668 tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, in _decode_opc()
675 tcg_gen_bswap16_i32(low, REG(B7_4), 0); in _decode_opc()
676 tcg_gen_deposit_i32(REG(B11_8), REG(B7_4), low, 0, 16); in _decode_opc()
680 tcg_gen_rotli_i32(REG(B11_8), REG(B7_4), 16); in _decode_opc()
686 tcg_gen_shli_i32(high, REG(B7_4), 16); in _decode_opc()
688 tcg_gen_shri_i32(low, REG(B11_8), 16); in _decode_opc()
689 tcg_gen_or_i32(REG(B11_8), high, low); in _decode_opc()
693 tcg_gen_add_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
700 tcg_gen_add2_i32(t1, cpu_sr_t, cpu_sr_t, t0, REG(B7_4), t0); in _decode_opc()
701 tcg_gen_add2_i32(REG(B11_8), cpu_sr_t, in _decode_opc()
702 REG(B11_8), t0, t1, cpu_sr_t); in _decode_opc()
707 TCGv Rn = REG(B11_8); in _decode_opc()
708 TCGv Rm = REG(B7_4); in _decode_opc()
724 tcg_gen_and_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
727 tcg_gen_setcond_i32(TCG_COND_EQ, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
730 tcg_gen_setcond_i32(TCG_COND_GE, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
733 tcg_gen_setcond_i32(TCG_COND_GT, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
736 tcg_gen_setcond_i32(TCG_COND_GTU, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
739 tcg_gen_setcond_i32(TCG_COND_GEU, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
745 tcg_gen_xor_i32(cmp2, REG(B7_4), REG(B11_8)); in _decode_opc()
753 tcg_gen_shri_i32(cpu_sr_q, REG(B11_8), 31); /* SR_Q */ in _decode_opc()
754 tcg_gen_shri_i32(cpu_sr_m, REG(B7_4), 31); /* SR_M */ in _decode_opc()
766 tcg_gen_shri_i32(t0, REG(B11_8), 31); in _decode_opc()
767 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
768 tcg_gen_or_i32(REG(B11_8), REG(B11_8), cpu_sr_t); in _decode_opc()
776 tcg_gen_neg_i32(t2, REG(B7_4)); in _decode_opc()
777 tcg_gen_movcond_i32(TCG_COND_EQ, t2, t1, zero, REG(B7_4), t2); in _decode_opc()
778 tcg_gen_add2_i32(REG(B11_8), t1, REG(B11_8), zero, t2, t1); in _decode_opc()
788 tcg_gen_muls2_i32(cpu_macl, cpu_mach, REG(B7_4), REG(B11_8)); in _decode_opc()
791 tcg_gen_mulu2_i32(cpu_macl, cpu_mach, REG(B7_4), REG(B11_8)); in _decode_opc()
794 tcg_gen_ext8s_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
797 tcg_gen_ext16s_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
800 tcg_gen_ext8u_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
803 tcg_gen_ext16u_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
809 tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx, in _decode_opc()
812 tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx, in _decode_opc()
815 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4); in _decode_opc()
816 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); in _decode_opc()
823 tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx, in _decode_opc()
826 tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx, in _decode_opc()
829 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 2); in _decode_opc()
830 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2); in _decode_opc()
834 tcg_gen_mul_i32(cpu_macl, REG(B7_4), REG(B11_8)); in _decode_opc()
840 tcg_gen_ext16s_i32(arg0, REG(B7_4)); in _decode_opc()
842 tcg_gen_ext16s_i32(arg1, REG(B11_8)); in _decode_opc()
850 tcg_gen_ext16u_i32(arg0, REG(B7_4)); in _decode_opc()
852 tcg_gen_ext16u_i32(arg1, REG(B11_8)); in _decode_opc()
857 tcg_gen_neg_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
862 tcg_gen_add2_i32(REG(B11_8), cpu_sr_t, in _decode_opc()
863 REG(B7_4), t0, cpu_sr_t, t0); in _decode_opc()
864 tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t, in _decode_opc()
865 t0, t0, REG(B11_8), cpu_sr_t); in _decode_opc()
870 tcg_gen_not_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
873 tcg_gen_or_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
881 tcg_gen_andi_i32(t0, REG(B7_4), 0x1f); in _decode_opc()
884 tcg_gen_shl_i32(t1, REG(B11_8), t0); in _decode_opc()
889 tcg_gen_sar_i32(t2, REG(B11_8), t0); in _decode_opc()
894 tcg_gen_movcond_i32(TCG_COND_GE, REG(B11_8), REG(B7_4), t0, t1, t2); in _decode_opc()
903 tcg_gen_andi_i32(t0, REG(B7_4), 0x1f); in _decode_opc()
906 tcg_gen_shl_i32(t1, REG(B11_8), t0); in _decode_opc()
911 tcg_gen_shr_i32(t2, REG(B11_8), t0); in _decode_opc()
916 tcg_gen_movcond_i32(TCG_COND_GE, REG(B11_8), REG(B7_4), t0, t1, t2); in _decode_opc()
920 tcg_gen_sub_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
927 tcg_gen_add2_i32(t1, cpu_sr_t, cpu_sr_t, t0, REG(B7_4), t0); in _decode_opc()
928 tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t, in _decode_opc()
929 REG(B11_8), t0, t1, cpu_sr_t); in _decode_opc()
935 TCGv Rn = REG(B11_8); in _decode_opc()
936 TCGv Rm = REG(B7_4); in _decode_opc()
954 tcg_gen_and_i32(val, REG(B7_4), REG(B11_8)); in _decode_opc()
959 tcg_gen_xor_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
977 tcg_gen_qemu_st_i64(fp, REG(B11_8), ctx->memidx, in _decode_opc()
980 tcg_gen_qemu_st_i32(FREG(B7_4), REG(B11_8), ctx->memidx, in _decode_opc()
988 tcg_gen_qemu_ld_i64(fp, REG(B7_4), ctx->memidx, in _decode_opc()
992 tcg_gen_qemu_ld_i32(FREG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
1000 tcg_gen_qemu_ld_i64(fp, REG(B7_4), ctx->memidx, in _decode_opc()
1003 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 8); in _decode_opc()
1005 tcg_gen_qemu_ld_i32(FREG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
1007 tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4); in _decode_opc()
1017 tcg_gen_subi_i32(addr, REG(B11_8), 8); in _decode_opc()
1021 tcg_gen_subi_i32(addr, REG(B11_8), 4); in _decode_opc()
1025 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
1032 tcg_gen_add_i32(addr, REG(B7_4), REG(0)); in _decode_opc()
1048 tcg_gen_add_i32(addr, REG(B11_8), REG(0)); in _decode_opc()
1139 tcg_gen_andi_i32(REG(0), REG(0), B7_0); in _decode_opc()
1145 tcg_gen_add_i32(addr, REG(0), cpu_gbr); in _decode_opc()
1173 tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, REG(0), B7_0s); in _decode_opc()
1179 tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_SB); in _decode_opc()
1186 tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_TESW | MO_ALIGN); in _decode_opc()
1193 tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_TESL | MO_ALIGN); in _decode_opc()
1200 tcg_gen_qemu_st_i32(REG(0), addr, ctx->memidx, MO_UB); in _decode_opc()
1207 tcg_gen_qemu_st_i32(REG(0), addr, ctx->memidx, MO_TEUW | MO_ALIGN); in _decode_opc()
1214 tcg_gen_qemu_st_i32(REG(0), addr, ctx->memidx, MO_TEUL | MO_ALIGN); in _decode_opc()
1220 tcg_gen_addi_i32(addr, REG(B7_4), B3_0); in _decode_opc()
1221 tcg_gen_qemu_st_i32(REG(0), addr, ctx->memidx, MO_UB); in _decode_opc()
1227 tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 2); in _decode_opc()
1228 tcg_gen_qemu_st_i32(REG(0), addr, ctx->memidx, in _decode_opc()
1235 tcg_gen_addi_i32(addr, REG(B7_4), B3_0); in _decode_opc()
1236 tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, MO_SB); in _decode_opc()
1242 tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 2); in _decode_opc()
1243 tcg_gen_qemu_ld_i32(REG(0), addr, ctx->memidx, in _decode_opc()
1249 tcg_gen_movi_i32(REG(0), ((ctx->base.pc_next & 0xfffffffc) + in _decode_opc()
1253 tcg_gen_ori_i32(REG(0), REG(0), B7_0); in _decode_opc()
1259 tcg_gen_add_i32(addr, REG(0), cpu_gbr); in _decode_opc()
1279 tcg_gen_andi_i32(val, REG(0), B7_0); in _decode_opc()
1286 tcg_gen_add_i32(val, REG(0), cpu_gbr); in _decode_opc()
1293 tcg_gen_xori_i32(REG(0), REG(0), B7_0); in _decode_opc()
1299 tcg_gen_add_i32(addr, REG(0), cpu_gbr); in _decode_opc()
1311 tcg_gen_mov_i32(ALTREG(B6_4), REG(B11_8)); in _decode_opc()
1315 tcg_gen_qemu_ld_i32(ALTREG(B6_4), REG(B11_8), ctx->memidx, in _decode_opc()
1317 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); in _decode_opc()
1321 tcg_gen_mov_i32(REG(B11_8), ALTREG(B6_4)); in _decode_opc()
1327 tcg_gen_subi_i32(addr, REG(B11_8), 4); in _decode_opc()
1330 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
1338 tcg_gen_addi_i32(cpu_delayed_pc, REG(B11_8), ctx->base.pc_next + 4); in _decode_opc()
1345 tcg_gen_add_i32(cpu_delayed_pc, REG(B11_8), cpu_pr); in _decode_opc()
1350 tcg_gen_setcondi_i32(TCG_COND_GT, cpu_sr_t, REG(B11_8), 0); in _decode_opc()
1353 tcg_gen_setcondi_i32(TCG_COND_GE, cpu_sr_t, REG(B11_8), 0); in _decode_opc()
1356 tcg_gen_subi_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1357 tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, REG(B11_8), 0); in _decode_opc()
1361 tcg_gen_mov_i32(cpu_delayed_pc, REG(B11_8)); in _decode_opc()
1368 tcg_gen_mov_i32(cpu_delayed_pc, REG(B11_8)); in _decode_opc()
1376 tcg_gen_andi_i32(val, REG(B11_8), 0x700083f3); in _decode_opc()
1385 tcg_gen_qemu_ld_i32(val, REG(B11_8), ctx->memidx, in _decode_opc()
1389 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); in _decode_opc()
1395 gen_read_sr(REG(B11_8)); in _decode_opc()
1402 tcg_gen_subi_i32(addr, REG(B11_8), 4); in _decode_opc()
1405 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
1411 tcg_gen_mov_i32 (cpu_##reg, REG(B11_8)); \ in _decode_opc()
1415 tcg_gen_qemu_ld_i32(cpu_##reg, REG(B11_8), ctx->memidx, \ in _decode_opc()
1417 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); \ in _decode_opc()
1422 tcg_gen_mov_i32 (REG(B11_8), cpu_##reg); \ in _decode_opc()
1428 tcg_gen_subi_i32(addr, REG(B11_8), 4); \ in _decode_opc()
1431 tcg_gen_mov_i32(REG(B11_8), addr); \ in _decode_opc()
1450 gen_helper_ld_fpscr(tcg_env, REG(B11_8)); in _decode_opc()
1457 tcg_gen_qemu_ld_i32(addr, REG(B11_8), ctx->memidx, in _decode_opc()
1459 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); in _decode_opc()
1466 tcg_gen_andi_i32(REG(B11_8), cpu_fpscr, 0x003fffff); in _decode_opc()
1475 tcg_gen_subi_i32(addr, REG(B11_8), 4); in _decode_opc()
1477 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
1483 tcg_gen_qemu_ld_i32(val, REG(B11_8), ctx->memidx, in _decode_opc()
1485 gen_helper_movcal(tcg_env, REG(B11_8), val); in _decode_opc()
1486 tcg_gen_qemu_st_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1494 tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1500 tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1502 tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); in _decode_opc()
1505 tcg_gen_mov_i32(REG(B11_8), cpu_sr_t); in _decode_opc()
1525 tcg_gen_brcond_i32(TCG_COND_NE, REG(B11_8), in _decode_opc()
1528 tcg_gen_atomic_cmpxchg_i32(tmp, REG(B11_8), cpu_lock_value, in _decode_opc()
1529 REG(0), ctx->memidx, in _decode_opc()
1534 tcg_gen_qemu_st_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1559 tcg_gen_mov_i32(tmp, REG(B11_8)); in _decode_opc()
1560 tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1562 tcg_gen_mov_i32(cpu_lock_value, REG(0)); in _decode_opc()
1565 tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, in _decode_opc()
1572 gen_helper_ocbi(tcg_env, REG(B11_8)); in _decode_opc()
1597 tcg_gen_shri_i32(cpu_sr_t, REG(B11_8), 31); in _decode_opc()
1598 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1599 tcg_gen_or_i32(REG(B11_8), REG(B11_8), tmp); in _decode_opc()
1606 tcg_gen_andi_i32(cpu_sr_t, REG(B11_8), 1); in _decode_opc()
1607 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1608 tcg_gen_or_i32(REG(B11_8), REG(B11_8), tmp); in _decode_opc()
1612 tcg_gen_rotli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1613 tcg_gen_andi_i32(cpu_sr_t, REG(B11_8), 0); in _decode_opc()
1616 tcg_gen_andi_i32(cpu_sr_t, REG(B11_8), 0); in _decode_opc()
1617 tcg_gen_rotri_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1621 tcg_gen_shri_i32(cpu_sr_t, REG(B11_8), 31); in _decode_opc()
1622 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1625 tcg_gen_andi_i32(cpu_sr_t, REG(B11_8), 1); in _decode_opc()
1626 tcg_gen_sari_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1629 tcg_gen_andi_i32(cpu_sr_t, REG(B11_8), 1); in _decode_opc()
1630 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1633 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 2); in _decode_opc()
1636 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 8); in _decode_opc()
1639 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 16); in _decode_opc()
1642 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 2); in _decode_opc()
1645 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 8); in _decode_opc()
1648 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 16); in _decode_opc()
1651 tcg_gen_atomic_fetch_or_i32(cpu_sr_t, REG(B11_8), in _decode_opc()
1970 op_arg = REG(op_src); in decode_gusa()
1999 op_arg = REG(op_src); in decode_gusa()
2085 tcg_gen_atomic_xchg_i32(REG(ld_dst), REG(ld_adr), REG(st_src), in decode_gusa()
2094 tcg_gen_atomic_add_fetch_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2097 tcg_gen_atomic_fetch_add_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2102 tcg_gen_add_i32(REG(op_dst), REG(ld_dst), op_arg); in decode_gusa()
2112 tcg_gen_atomic_and_fetch_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2115 tcg_gen_atomic_fetch_and_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2117 tcg_gen_and_i32(REG(op_dst), REG(ld_dst), op_arg); in decode_gusa()
2126 tcg_gen_atomic_or_fetch_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2129 tcg_gen_atomic_fetch_or_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2131 tcg_gen_or_i32(REG(op_dst), REG(ld_dst), op_arg); in decode_gusa()
2140 tcg_gen_atomic_xor_fetch_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2143 tcg_gen_atomic_fetch_xor_i32(REG(ld_dst), REG(ld_adr), in decode_gusa()
2145 tcg_gen_xor_i32(REG(op_dst), REG(ld_dst), op_arg); in decode_gusa()
2153 tcg_gen_atomic_cmpxchg_i32(REG(ld_dst), REG(ld_adr), op_arg, in decode_gusa()
2154 REG(st_src), ctx->memidx, ld_mop); in decode_gusa()
2155 tcg_gen_setcond_i32(TCG_COND_EQ, cpu_sr_t, REG(ld_dst), op_arg); in decode_gusa()
2157 tcg_gen_mov_i32(REG(mt_dst), cpu_sr_t); in decode_gusa()