Lines Matching +full:entry +full:- +full:address
23 #include "exec/exec-all.h"
24 #include "exec/page-protection.h"
33 #define MMU_ITLB_MISS (-1)
34 #define MMU_ITLB_MULTIPLE (-2)
35 #define MMU_ITLB_VIOLATION (-3)
36 #define MMU_DTLB_MISS_READ (-4)
37 #define MMU_DTLB_MISS_WRITE (-5)
38 #define MMU_DTLB_INITIAL_WRITE (-6)
39 #define MMU_DTLB_VIOLATION_READ (-7)
40 #define MMU_DTLB_VIOLATION_WRITE (-8)
41 #define MMU_DTLB_MULTIPLE (-9)
42 #define MMU_DTLB_MISS (-10)
43 #define MMU_IADDR_ERROR (-11)
44 #define MMU_DADDR_ERROR_READ (-12)
45 #define MMU_DADDR_ERROR_WRITE (-13)
60 int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD; in superh_cpu_do_interrupt()
61 int do_exp, irq_vector = cs->exception_index; in superh_cpu_do_interrupt()
65 do_exp = cs->exception_index != -1; in superh_cpu_do_interrupt()
66 do_irq = do_irq && (cs->exception_index == -1); in superh_cpu_do_interrupt()
68 if (env->sr & (1u << SR_BL)) { in superh_cpu_do_interrupt()
69 if (do_exp && cs->exception_index != 0x1e0) { in superh_cpu_do_interrupt()
74 should be loaded with the kernel entry point. in superh_cpu_do_interrupt()
79 if (do_irq && !env->in_sleep) { in superh_cpu_do_interrupt()
83 env->in_sleep = 0; in superh_cpu_do_interrupt()
86 irq_vector = sh_intc_get_pending_vector(env->intc_handle, in superh_cpu_do_interrupt()
87 (env->sr >> 4) & 0xf); in superh_cpu_do_interrupt()
88 if (irq_vector == -1) { in superh_cpu_do_interrupt()
95 switch (cs->exception_index) { in superh_cpu_do_interrupt()
144 env->ssr = cpu_read_sr(env); in superh_cpu_do_interrupt()
145 env->spc = env->pc; in superh_cpu_do_interrupt()
146 env->sgr = env->gregs[15]; in superh_cpu_do_interrupt()
147 env->sr |= (1u << SR_BL) | (1u << SR_MD) | (1u << SR_RB); in superh_cpu_do_interrupt()
148 env->lock_addr = -1; in superh_cpu_do_interrupt()
150 if (env->flags & TB_FLAG_DELAY_SLOT_MASK) { in superh_cpu_do_interrupt()
152 env->spc -= 2; in superh_cpu_do_interrupt()
154 env->flags &= ~TB_FLAG_DELAY_SLOT_MASK; in superh_cpu_do_interrupt()
158 env->expevt = cs->exception_index; in superh_cpu_do_interrupt()
159 switch (cs->exception_index) { in superh_cpu_do_interrupt()
163 env->sr &= ~(1u << SR_FD); in superh_cpu_do_interrupt()
164 env->sr |= 0xf << 4; /* IMASK */ in superh_cpu_do_interrupt()
165 env->pc = 0xa0000000; in superh_cpu_do_interrupt()
169 env->pc = env->vbr + 0x400; in superh_cpu_do_interrupt()
172 env->spc += 2; /* special case for TRAPA */ in superh_cpu_do_interrupt()
175 env->pc = env->vbr + 0x100; in superh_cpu_do_interrupt()
182 env->intevt = irq_vector; in superh_cpu_do_interrupt()
183 env->pc = env->vbr + 0x600; in superh_cpu_do_interrupt()
209 env->mmucr &= (and_mask << 24) | 0x00ffffff; in update_itlb_use()
210 env->mmucr |= (or_mask << 24); in update_itlb_use()
215 if ((env->mmucr & 0xe0000000) == 0xe0000000) { in itlb_replacement()
218 if ((env->mmucr & 0x98000000) == 0x18000000) { in itlb_replacement()
221 if ((env->mmucr & 0x54000000) == 0x04000000) { in itlb_replacement()
224 if ((env->mmucr & 0x2c000000) == 0x00000000) { in itlb_replacement()
230 /* Find the corresponding entry in the right TLB
231 Return entry, MMU_DTLB_MISS or MMU_DTLB_MULTIPLE
233 static int find_tlb_entry(CPUSH4State * env, target_ulong address, in find_tlb_entry() argument
241 asid = env->pteh & 0xff; in find_tlb_entry()
245 continue; /* Invalid entry */ in find_tlb_entry()
248 start = (entries[i].vpn << 10) & ~(entries[i].size - 1); in find_tlb_entry()
249 end = start + entries[i].size - 1; in find_tlb_entry()
250 if (address >= start && address <= end) { /* Match */ in find_tlb_entry()
264 urb = ((env->mmucr) >> 18) & 0x3f; in increment_urc()
265 urc = ((env->mmucr) >> 10) & 0x3f; in increment_urc()
267 if ((urb > 0 && urc > urb) || urc > (UTLB_SIZE - 1)) in increment_urc()
269 env->mmucr = (env->mmucr & 0xffff03ff) | (urc << 10); in increment_urc()
272 /* Copy and utlb entry into itlb
273 Return entry
281 ientry = &env->itlb[itlb]; in copy_utlb_entry_itlb()
282 if (ientry->v) { in copy_utlb_entry_itlb()
283 tlb_flush_page(env_cpu(env), ientry->vpn << 10); in copy_utlb_entry_itlb()
285 *ientry = env->utlb[utlb]; in copy_utlb_entry_itlb()
290 /* Find itlb entry
291 Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
293 static int find_itlb_entry(CPUSH4State * env, target_ulong address, in find_itlb_entry() argument
298 e = find_tlb_entry(env, address, env->itlb, ITLB_SIZE, use_asid); in find_itlb_entry()
309 /* Find utlb entry
310 Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
311 static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid) in find_utlb_entry() argument
316 /* Return entry */ in find_utlb_entry()
317 return find_tlb_entry(env, address, env->utlb, UTLB_SIZE, use_asid); in find_utlb_entry()
320 /* Match address against MMU
328 int *prot, target_ulong address, in get_mmu_address() argument
334 use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in get_mmu_address()
337 n = find_itlb_entry(env, address, use_asid); in get_mmu_address()
339 matching = &env->itlb[n]; in get_mmu_address()
340 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
346 n = find_utlb_entry(env, address, use_asid); in get_mmu_address()
349 matching = &env->itlb[n]; in get_mmu_address()
350 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
354 if ((matching->pr & 1) && matching->d) { in get_mmu_address()
365 n = find_utlb_entry(env, address, use_asid); in get_mmu_address()
367 matching = &env->utlb[n]; in get_mmu_address()
368 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
371 } else if ((access_type == MMU_DATA_STORE) && !(matching->pr & 1)) { in get_mmu_address()
373 } else if ((access_type == MMU_DATA_STORE) && !matching->d) { in get_mmu_address()
377 if ((matching->pr & 1) && matching->d) { in get_mmu_address()
388 *physical = ((matching->ppn << 10) & ~(matching->size - 1)) in get_mmu_address()
389 | (address & (matching->size - 1)); in get_mmu_address()
395 int *prot, target_ulong address, in get_physical_address() argument
399 if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) { in get_physical_address()
400 if (!(env->sr & (1u << SR_MD)) in get_physical_address()
401 && (address < 0xe0000000 || address >= 0xe4000000)) { in get_physical_address()
412 if (address >= 0x80000000 && address < 0xc0000000) { in get_physical_address()
414 *physical = address & 0x1fffffff; in get_physical_address()
416 *physical = address; in get_physical_address()
423 if (!(env->mmucr & MMUCR_AT)) { in get_physical_address()
424 *physical = address & 0x1FFFFFFF; in get_physical_address()
430 return get_mmu_address(env, physical, prot, address, access_type); in get_physical_address()
443 return -1; in superh_cpu_get_phys_page_debug()
449 int n = cpu_mmucr_urc(env->mmucr); in cpu_load_tlb()
450 tlb_t * entry = &env->utlb[n]; in cpu_load_tlb() local
452 if (entry->v) { in cpu_load_tlb()
453 /* Overwriting valid entry in utlb. */ in cpu_load_tlb()
454 target_ulong address = entry->vpn << 10; in cpu_load_tlb() local
455 tlb_flush_page(cs, address); in cpu_load_tlb()
459 entry->asid = (uint8_t)cpu_pteh_asid(env->pteh); in cpu_load_tlb()
460 entry->vpn = cpu_pteh_vpn(env->pteh); in cpu_load_tlb()
461 entry->v = (uint8_t)cpu_ptel_v(env->ptel); in cpu_load_tlb()
462 entry->ppn = cpu_ptel_ppn(env->ptel); in cpu_load_tlb()
463 entry->sz = (uint8_t)cpu_ptel_sz(env->ptel); in cpu_load_tlb()
464 switch (entry->sz) { in cpu_load_tlb()
466 entry->size = 1024; /* 1K */ in cpu_load_tlb()
469 entry->size = 1024 * 4; /* 4K */ in cpu_load_tlb()
472 entry->size = 1024 * 64; /* 64K */ in cpu_load_tlb()
475 entry->size = 1024 * 1024; /* 1M */ in cpu_load_tlb()
481 entry->sh = (uint8_t)cpu_ptel_sh(env->ptel); in cpu_load_tlb()
482 entry->c = (uint8_t)cpu_ptel_c(env->ptel); in cpu_load_tlb()
483 entry->pr = (uint8_t)cpu_ptel_pr(env->ptel); in cpu_load_tlb()
484 entry->d = (uint8_t)cpu_ptel_d(env->ptel); in cpu_load_tlb()
485 entry->wt = (uint8_t)cpu_ptel_wt(env->ptel); in cpu_load_tlb()
486 entry->sa = (uint8_t)cpu_ptea_sa(env->ptea); in cpu_load_tlb()
487 entry->tc = (uint8_t)cpu_ptea_tc(env->ptea); in cpu_load_tlb()
496 tlb_t * entry = &s->utlb[i]; in cpu_sh4_invalidate_tlb() local
497 entry->v = 0; in cpu_sh4_invalidate_tlb()
501 tlb_t * entry = &s->itlb[i]; in cpu_sh4_invalidate_tlb() local
502 entry->v = 0; in cpu_sh4_invalidate_tlb()
512 tlb_t * entry = &s->itlb[index]; in cpu_sh4_read_mmaped_itlb_addr() local
514 return (entry->vpn << 10) | in cpu_sh4_read_mmaped_itlb_addr()
515 (entry->v << 8) | in cpu_sh4_read_mmaped_itlb_addr()
516 (entry->asid); in cpu_sh4_read_mmaped_itlb_addr()
527 tlb_t * entry = &s->itlb[index]; in cpu_sh4_write_mmaped_itlb_addr() local
528 if (entry->v) { in cpu_sh4_write_mmaped_itlb_addr()
529 /* Overwriting valid entry in itlb. */ in cpu_sh4_write_mmaped_itlb_addr()
530 target_ulong address = entry->vpn << 10; in cpu_sh4_write_mmaped_itlb_addr() local
531 tlb_flush_page(env_cpu(s), address); in cpu_sh4_write_mmaped_itlb_addr()
533 entry->asid = asid; in cpu_sh4_write_mmaped_itlb_addr()
534 entry->vpn = vpn; in cpu_sh4_write_mmaped_itlb_addr()
535 entry->v = v; in cpu_sh4_write_mmaped_itlb_addr()
543 tlb_t * entry = &s->itlb[index]; in cpu_sh4_read_mmaped_itlb_data() local
547 return (entry->ppn << 10) | in cpu_sh4_read_mmaped_itlb_data()
548 (entry->v << 8) | in cpu_sh4_read_mmaped_itlb_data()
549 (entry->pr << 5) | in cpu_sh4_read_mmaped_itlb_data()
550 ((entry->sz & 1) << 6) | in cpu_sh4_read_mmaped_itlb_data()
551 ((entry->sz & 2) << 4) | in cpu_sh4_read_mmaped_itlb_data()
552 (entry->c << 3) | in cpu_sh4_read_mmaped_itlb_data()
553 (entry->sh << 1); in cpu_sh4_read_mmaped_itlb_data()
556 return (entry->tc << 1) | in cpu_sh4_read_mmaped_itlb_data()
557 (entry->sa); in cpu_sh4_read_mmaped_itlb_data()
566 tlb_t * entry = &s->itlb[index]; in cpu_sh4_write_mmaped_itlb_data() local
570 if (entry->v) { in cpu_sh4_write_mmaped_itlb_data()
571 /* Overwriting valid entry in utlb. */ in cpu_sh4_write_mmaped_itlb_data()
572 target_ulong address = entry->vpn << 10; in cpu_sh4_write_mmaped_itlb_data() local
573 tlb_flush_page(env_cpu(s), address); in cpu_sh4_write_mmaped_itlb_data()
575 entry->ppn = (mem_value & 0x1ffffc00) >> 10; in cpu_sh4_write_mmaped_itlb_data()
576 entry->v = (mem_value & 0x00000100) >> 8; in cpu_sh4_write_mmaped_itlb_data()
577 entry->sz = (mem_value & 0x00000080) >> 6 | in cpu_sh4_write_mmaped_itlb_data()
579 entry->pr = (mem_value & 0x00000040) >> 5; in cpu_sh4_write_mmaped_itlb_data()
580 entry->c = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_itlb_data()
581 entry->sh = (mem_value & 0x00000002) >> 1; in cpu_sh4_write_mmaped_itlb_data()
584 entry->tc = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_itlb_data()
585 entry->sa = (mem_value & 0x00000007); in cpu_sh4_write_mmaped_itlb_data()
593 tlb_t * entry = &s->utlb[index]; in cpu_sh4_read_mmaped_utlb_addr() local
597 return (entry->vpn << 10) | in cpu_sh4_read_mmaped_utlb_addr()
598 (entry->v << 8) | in cpu_sh4_read_mmaped_utlb_addr()
599 (entry->asid); in cpu_sh4_read_mmaped_utlb_addr()
610 int use_asid = !(s->mmucr & MMUCR_SV) || !(s->sr & (1u << SR_MD)); in cpu_sh4_write_mmaped_utlb_addr()
619 tlb_t * entry = &s->utlb[i]; in cpu_sh4_write_mmaped_utlb_addr() local
620 if (!entry->v) in cpu_sh4_write_mmaped_utlb_addr()
623 if (entry->vpn == vpn in cpu_sh4_write_mmaped_utlb_addr()
624 && (!use_asid || entry->asid == asid || entry->sh)) { in cpu_sh4_write_mmaped_utlb_addr()
629 cs->exception_index = 0x140; in cpu_sh4_write_mmaped_utlb_addr()
630 s->tea = addr; in cpu_sh4_write_mmaped_utlb_addr()
633 if (entry->v && !v) in cpu_sh4_write_mmaped_utlb_addr()
635 entry->v = v; in cpu_sh4_write_mmaped_utlb_addr()
636 entry->d = d; in cpu_sh4_write_mmaped_utlb_addr()
637 utlb_match_entry = entry; in cpu_sh4_write_mmaped_utlb_addr()
644 tlb_t * entry = &s->itlb[i]; in cpu_sh4_write_mmaped_utlb_addr() local
645 if (entry->vpn == vpn in cpu_sh4_write_mmaped_utlb_addr()
646 && (!use_asid || entry->asid == asid || entry->sh)) { in cpu_sh4_write_mmaped_utlb_addr()
647 if (entry->v && !v) in cpu_sh4_write_mmaped_utlb_addr()
650 *entry = *utlb_match_entry; in cpu_sh4_write_mmaped_utlb_addr()
652 entry->v = v; in cpu_sh4_write_mmaped_utlb_addr()
662 tlb_t * entry = &s->utlb[index]; in cpu_sh4_write_mmaped_utlb_addr() local
663 if (entry->v) { in cpu_sh4_write_mmaped_utlb_addr()
666 /* Overwriting valid entry in utlb. */ in cpu_sh4_write_mmaped_utlb_addr()
667 target_ulong address = entry->vpn << 10; in cpu_sh4_write_mmaped_utlb_addr() local
668 tlb_flush_page(cs, address); in cpu_sh4_write_mmaped_utlb_addr()
670 entry->asid = asid; in cpu_sh4_write_mmaped_utlb_addr()
671 entry->vpn = vpn; in cpu_sh4_write_mmaped_utlb_addr()
672 entry->d = d; in cpu_sh4_write_mmaped_utlb_addr()
673 entry->v = v; in cpu_sh4_write_mmaped_utlb_addr()
683 tlb_t * entry = &s->utlb[index]; in cpu_sh4_read_mmaped_utlb_data() local
689 return (entry->ppn << 10) | in cpu_sh4_read_mmaped_utlb_data()
690 (entry->v << 8) | in cpu_sh4_read_mmaped_utlb_data()
691 (entry->pr << 5) | in cpu_sh4_read_mmaped_utlb_data()
692 ((entry->sz & 1) << 6) | in cpu_sh4_read_mmaped_utlb_data()
693 ((entry->sz & 2) << 4) | in cpu_sh4_read_mmaped_utlb_data()
694 (entry->c << 3) | in cpu_sh4_read_mmaped_utlb_data()
695 (entry->d << 2) | in cpu_sh4_read_mmaped_utlb_data()
696 (entry->sh << 1) | in cpu_sh4_read_mmaped_utlb_data()
697 (entry->wt); in cpu_sh4_read_mmaped_utlb_data()
700 return (entry->tc << 1) | in cpu_sh4_read_mmaped_utlb_data()
701 (entry->sa); in cpu_sh4_read_mmaped_utlb_data()
710 tlb_t * entry = &s->utlb[index]; in cpu_sh4_write_mmaped_utlb_data() local
716 if (entry->v) { in cpu_sh4_write_mmaped_utlb_data()
717 /* Overwriting valid entry in utlb. */ in cpu_sh4_write_mmaped_utlb_data()
718 target_ulong address = entry->vpn << 10; in cpu_sh4_write_mmaped_utlb_data() local
719 tlb_flush_page(env_cpu(s), address); in cpu_sh4_write_mmaped_utlb_data()
721 entry->ppn = (mem_value & 0x1ffffc00) >> 10; in cpu_sh4_write_mmaped_utlb_data()
722 entry->v = (mem_value & 0x00000100) >> 8; in cpu_sh4_write_mmaped_utlb_data()
723 entry->sz = (mem_value & 0x00000080) >> 6 | in cpu_sh4_write_mmaped_utlb_data()
725 entry->pr = (mem_value & 0x00000060) >> 5; in cpu_sh4_write_mmaped_utlb_data()
726 entry->c = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_utlb_data()
727 entry->d = (mem_value & 0x00000004) >> 2; in cpu_sh4_write_mmaped_utlb_data()
728 entry->sh = (mem_value & 0x00000002) >> 1; in cpu_sh4_write_mmaped_utlb_data()
729 entry->wt = (mem_value & 0x00000001); in cpu_sh4_write_mmaped_utlb_data()
732 entry->tc = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_utlb_data()
733 entry->sa = (mem_value & 0x00000007); in cpu_sh4_write_mmaped_utlb_data()
740 int use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in cpu_sh4_is_cached()
743 if (env->sr & (1u << SR_MD)) { in cpu_sh4_is_cached()
761 if (!(env->ccr & 1)) in cpu_sh4_is_cached()
766 if (env->mmucr & MMUCR_AT) in cpu_sh4_is_cached()
770 n = find_tlb_entry(env, addr, env->itlb, ITLB_SIZE, use_asid); in cpu_sh4_is_cached()
772 return env->itlb[n].c; in cpu_sh4_is_cached()
774 n = find_tlb_entry(env, addr, env->utlb, UTLB_SIZE, use_asid); in cpu_sh4_is_cached()
776 return env->utlb[n].c; in cpu_sh4_is_cached()
785 if (cpu_env(cs)->flags & TB_FLAG_DELAY_SLOT_MASK) { in superh_cpu_exec_interrupt()
795 bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, in superh_cpu_tlb_fill() argument
805 ret = get_physical_address(env, &physical, &prot, address, access_type); in superh_cpu_tlb_fill()
808 address &= TARGET_PAGE_MASK; in superh_cpu_tlb_fill()
810 tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE); in superh_cpu_tlb_fill()
818 env->pteh = (env->pteh & PTEH_ASID_MASK) | (address & PTEH_VPN_MASK); in superh_cpu_tlb_fill()
821 env->tea = address; in superh_cpu_tlb_fill()
825 cs->exception_index = 0x040; in superh_cpu_tlb_fill()
829 cs->exception_index = 0x140; in superh_cpu_tlb_fill()
832 cs->exception_index = 0x0a0; in superh_cpu_tlb_fill()
835 cs->exception_index = 0x060; in superh_cpu_tlb_fill()
838 cs->exception_index = 0x080; in superh_cpu_tlb_fill()
841 cs->exception_index = 0x0a0; in superh_cpu_tlb_fill()
844 cs->exception_index = 0x0c0; in superh_cpu_tlb_fill()
848 cs->exception_index = 0x0e0; in superh_cpu_tlb_fill()
851 cs->exception_index = 0x100; in superh_cpu_tlb_fill()