Lines Matching full:se
230 const bool se = extract32(simd_data(desc), 3, 1); \
233 vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC()); \
324 const bool se = extract32(simd_data(desc), 3, 1); \
326 vop##BITS##_3(v1, v2, v3, env, se, float##BITS##_##OP, GETPC()); \
504 const bool se = extract32(simd_data(desc), 3, 1); \
508 vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
514 const bool se = extract32(simd_data(desc), 3, 1); \
518 env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
683 const bool se = extract32(simd_data(desc), 3, 1); \
685 vfma##BITS(v1, v2, v3, v4, env, se, FLAGS, GETPC()); \
904 S390MinMaxType type, bool is_min, bool is_abs, bool se, in vfminmax32() argument
956 if (se || vxc) { in vfminmax32()
966 S390MinMaxType type, bool is_min, bool is_abs, bool se, in vfminmax64() argument
1018 if (se || vxc) { in vfminmax64()
1028 S390MinMaxType type, bool is_min, bool is_abs, bool se, in vfminmax128() argument
1083 const bool se = extract32(simd_data(desc), 3, 1); \
1092 vfminmax##BITS(v1, v2, v3, env, type, IS_MIN, is_abs, se, GETPC()); \