Lines Matching refs:a

160         struct { TCGv_i64 a, b; } s64;  member
161 struct { TCGv_i32 a, b; } s32; member
688 c->u.s32.a = cc_op; in disas_jcc()
809 c->u.s32.a = tcg_temp_new_i32(); in disas_jcc()
810 tcg_gen_extrl_i64_i32(c->u.s32.a, cc_dst); in disas_jcc()
816 c->u.s32.a = tcg_temp_new_i32(); in disas_jcc()
817 tcg_gen_extrl_i64_i32(c->u.s32.a, cc_src); in disas_jcc()
825 c->u.s64.a = cc_dst; in disas_jcc()
834 c->u.s64.a = cc_src; in disas_jcc()
845 c->u.s64.a = cc_dst; in disas_jcc()
849 c->u.s64.a = cc_src; in disas_jcc()
858 c->u.s32.a = cc_op; in disas_jcc()
884 c->u.s32.a = tcg_temp_new_i32(); in disas_jcc()
886 tcg_gen_addi_i32(c->u.s32.a, cc_op, -1); in disas_jcc()
1144 c->u.s64.a, c->u.s64.b, lab); in help_branch()
1147 c->u.s32.a, c->u.s32.b, lab); in help_branch()
1517 c.u.s32.a = tcg_temp_new_i32(); in op_bct32()
1519 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bct32()
1539 c.u.s32.a = tcg_temp_new_i32(); in op_bcth()
1541 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bcth()
1557 c.u.s64.a = regs[r1]; in op_bct64()
1578 c.u.s32.a = tcg_temp_new_i32(); in op_bx32()
1580 tcg_gen_extrl_i64_i32(c.u.s32.a, t); in op_bx32()
1606 c.u.s64.a = regs[r1]; in op_bx64()
1623 c.u.s64.a = o->in1; in op_cj()
2842 tcg_gen_movcond_i64(c.cond, o->out, c.u.s64.a, c.u.s64.b, in op_loc()
2848 tcg_gen_setcond_i32(c.cond, t32, c.u.s32.a, c.u.s32.b); in op_loc()
3882 TCGv_i64 a, h; in op_soc() local
3894 tcg_gen_brcond_i64(c.cond, c.u.s64.a, c.u.s64.b, lab); in op_soc()
3896 tcg_gen_brcond_i32(c.cond, c.u.s32.a, c.u.s32.b, lab); in op_soc()
3900 a = get_address(s, 0, get_field(s, b2), get_field(s, d2)); in op_soc()
3903 tcg_gen_qemu_st_i64(regs[r1], a, get_mem_index(s), MO_TEUQ); in op_soc()
3906 tcg_gen_qemu_st_i64(regs[r1], a, get_mem_index(s), MO_TEUL); in op_soc()
3911 tcg_gen_qemu_st_i64(h, a, get_mem_index(s), MO_TEUL); in op_soc()