332     TCGv t;  in get_gpr()  local
344             t = tcg_temp_new();  in get_gpr()
345             tcg_gen_ext32s_tl(t, cpu_gpr[reg_num]);  in get_gpr()
346             return t;  in get_gpr()
348             t = tcg_temp_new();  in get_gpr()
349             tcg_gen_ext32u_tl(t, cpu_gpr[reg_num]);  in get_gpr()
350             return t;  in get_gpr()
389 static void gen_set_gpr(DisasContext *ctx, int reg_num, TCGv t)  in gen_set_gpr()  argument
394             tcg_gen_ext32s_tl(cpu_gpr[reg_num], t);  in gen_set_gpr()
398             tcg_gen_mov_tl(cpu_gpr[reg_num], t);  in gen_set_gpr()
453         TCGv_i64 t = tcg_temp_new_i64();  in get_fpr_hs()  local
454         tcg_gen_ext_i32_i64(t, cpu_gpr[reg_num]);  in get_fpr_hs()
455         return t;  in get_fpr_hs()
479         TCGv_i64 t = tcg_temp_new_i64();  in get_fpr_d()  local
480         tcg_gen_concat_tl_i64(t, cpu_gpr[reg_num], cpu_gpr[reg_num + 1]);  in get_fpr_d()
481         return t;  in get_fpr_d()
515 static void gen_set_fpr_hs(DisasContext *ctx, int reg_num, TCGv_i64 t)  in gen_set_fpr_hs()  argument
518         tcg_gen_mov_i64(cpu_fpr[reg_num], t);  in gen_set_fpr_hs()
525             tcg_gen_extrl_i64_i32(cpu_gpr[reg_num], t);  in gen_set_fpr_hs()
530             tcg_gen_mov_i64(cpu_gpr[reg_num], t);  in gen_set_fpr_hs()
539 static void gen_set_fpr_d(DisasContext *ctx, int reg_num, TCGv_i64 t)  in gen_set_fpr_d()  argument
542         tcg_gen_mov_i64(cpu_fpr[reg_num], t);  in gen_set_fpr_d()
550             tcg_gen_extr_i64_i32(cpu_gpr[reg_num], cpu_gpr[reg_num + 1], t);  in gen_set_fpr_d()
553             tcg_gen_ext32s_i64(cpu_gpr[reg_num], t);  in gen_set_fpr_d()
554             tcg_gen_sari_i64(cpu_gpr[reg_num + 1], t, 32);  in gen_set_fpr_d()
557             tcg_gen_mov_i64(cpu_gpr[reg_num], t);  in gen_set_fpr_d()